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US 11,903,200 B2Granted
Semiconductor memory device and method for fabricating the semiconductor memory device
AssigneeSK hynix Inc.
InventorsYu Jeong Lee, Dae Hwan Yun, Gil Bok Choi
Life of this patent
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Abstract
A semiconductor memory device may include a core pillar extended in a vertical direction, a channel layer having a first region covering a portion of a side surface of the core pillar and a second region covering the other portion of the side surface of the core pillar and a bottom surface of the core pillar, the second region abutting the first region, and a channel passivation layer formed in the first region of the channel layer and abutting the core pillar.
Claims17
A semiconductor memory device comprising:
- a core pillar extended in a vertical direction;
- a channel layer having a first region covering a portion of a side surface of the core pillar and a second region covering an other portion of the side surface of the core pillar and a bottom surface of the core pillar, the second region positioned under the first region;
- and
- a channel passivation layer formed in the first region of the channel layer and abutting the core pillar,
- wherein the channel layer of the first region has a smaller thickness than the channel layer of the second region, and
- wherein an upper surface of the channel layer of the second region is contacted with bottom surfaces of the channel layer of the first region and the channel passivation layer.
3 more elements
A semiconductor memory device comprising:
- a gate stack formed on a source layer, and having a plurality of interlayer dielectric layers and a plurality of gate conductive layers which are alternately stacked therein;
- and
- a plurality of channel structures formed through the gate stack, and each having a lower end extended into the source layer,
- wherein each of the channel structures comprises:
- a channel layer having a first region faced to the gate stack and a second region extending toward the source line from the first region;
- and
- a channel passivation layer formed on a surface of the channel layer of the first region,
- wherein the channel layer of the first region has a smaller thickness than the channel layer of the second region, and
- wherein an upper surface of the channel layer of the second region is contacted with bottom surfaces of the channel layer of the first region and the channel passivation layer.
6 more elements
Dependencies are inferred from the claim text.