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US 11,901,890 B2Granted
Multi-termination scheme interface
AssigneeMarvell Asia Pte Ltd
InventorLu Wang
Life of this patent
Estimating the term…
Abstract
In an embodiment, a method includes programming a control signal that specifies a target resistance and a target voltage in a circuit. The method further includes sending the control signal to at least one transistor configured to control a current flow in the circuit. The method further includes providing, as an output, a signal with the target voltage and target resistance.
Claims32
A method comprising:
- programming a plurality of control signals including a first control signal and a second control signal that specify a target resistance and a target voltage in a circuit;
- generating a plurality of gate signals based on the first control signal and the second control signal;
- sending the plurality of gate signals to a plurality of transistors, each respective transistor of the plurality of transistors coupled with a respective resistor of a plurality of resistors and at least one of a voltage source and a ground to allow, when a respective gate signal enables the respective transistor, current to flow through the respective transistor, the respective resistor, and the at least one of the voltage source and the ground, wherein at least two transistors of the plurality of transistors are in parallel branches;
- and
- providing, as an output, a signal with the target voltage and target resistance.
2 more elements
A system comprising:
- a plurality of transistors in a circuit;
- and
- a signal generation circuit configured to generate a plurality of gate signals based on a plurality of control signals including a first control signal and a second control signal that specify a target resistance and a target voltage in the circuit;
- wherein each respective transistor of the plurality of transistors is coupled with a respective resistor of a plurality of resistors and at least one of a voltage source and a ground to allow, when a respective gate signal enables the respective transistor, current to flow through the respective transistor, the respective resistor, and the at least one of the voltage source and the ground.
1 more element
A method comprising:
- programming a plurality of control signals including a first control signal and a second control signal that specify a target resistance and a target voltage in a circuit;
- generating a plurality of gate signals based on the first control signal and the second control signal;
- sending the plurality of gate signals to at least one transistor, each respective transistor of the at least one transistor coupled with a respective resistor of a plurality of resistors and at least one of a voltage source and a ground to allow, when a respective gate signal enables the respective transistor, current to flow through the respective transistor, the respective resistor, and the at least one of the voltage source and the ground, wherein at least two transistors of the plurality of transistors are in parallel branches;
- and
- providing, as an output, a signal with the target voltage and target resistance.
2 more elements
A system comprising:
- at least two transistors in a circuit;
- and
- a signal generation circuit configured to generate a plurality of gate signals based on a plurality of control signals that specify a target resistance and a target voltage in the circuit, the plurality of control signals including a first control signal and second control signal,
- wherein the signal generation circuit is further configured to generate the plurality of gate signals based on the first control signal and the second control signal;
- wherein at least one transistor of the at least two transistors is configured to receive, respectively, one of the plurality of gate signals, the circuit providing, as an output, a signal with the target voltage and target resistance;
- wherein at least two transistors of the at least two transistors are in parallel branches.
3 more elements
Dependencies are inferred from the claim text.