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US 11,901,802 B2Granted
Control circuit for a power supply and power supply with reduced standby power losses
AssigneeInfineon Technologies Austria AG
InventorSang Ho Jang
Life of this patent
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Abstract
A control circuit, a power supply including a control circuit, and a method are disclosed. The control circuit is configured to activate a second output capacitor connected in parallel with a first output capacitor of a power supply when the power supply is in a normal operating mode, and deactivate the second output capacitor when the power supply is in a standby mode.
Claims24
An apparatus comprising:
- a control circuit operative to:
- activate a second output capacitor connected in parallel with a first output capacitor of a power supply during a condition in which the power supply is in a standby mode;
- deactivate the second output capacitor when the power supply is in a normal operating mode;
- and
- wherein a dielectric strength of the second output capacitor is less than 50% of a dielectric strength of the first output capacitor.
2 more elements
A method comprising:
- switching between operating a power supply in a normal operating mode and a standby mode, wherein operating the power supply in the standby mode comprises activating a second output capacitor connected in parallel with a first output capacitor of the power supply,
- wherein operating the power supply in the normal operating mode comprises deactivating the second output capacitor;
- and
- wherein a dielectric strength of the second output capacitor is less than 50% of a dielectric strength of the first output capacitor.
1 more element
An apparatus comprising:
- a controller operative to:
- monitor an output voltage outputted from a power converter, the output voltage of the power converter supplied to a capacitor bank, a capacitance of the capacitor bank being adjustable, the capacitor bank storing the output voltage received from the power converter;
- and
- adjust the capacitance of the capacitor bank depending on usage of the stored output voltage in the capacitor bank in which:
- i) the capacitance of the capacitor bank is set to a first capacitance setting during a first condition in which the stored output voltage in the capacitor bank powers a load via activation of a first switch conveying the stored output voltage in the capacitor bank through the first switch to the load, and ii) the capacitance of the capacitor bank is set to a second capacitance setting during a second condition in which the output voltage stored in the capacitor bank is prevented from powering the load via deactivation of the first switch, the deactivation of the first switch preventing conveyance of the stored output voltage in the capacitor bank throw h the first switch to the load.
2 more elements
Dependencies are inferred from the claim text.