Method of manufacturing a FinFET by implanting a dielectric with a dopant

A method comprising:

• forming a fin protruding from a semiconductor substrate;
• forming a gate structure over a channel region of the fin;
• forming an epitaxial source/drain region in the fin adjacent the channel region;
• forming a first inter-layer dielectric (ILD) layer over the epitaxial source/drain region;
• forming a second ILD layer over the gate structure and over the first ILD;
• forming a source/drain contact penetrating through the first ILD and the second ILD to physically contact the epitaxial source/drain region, wherein the source/drain contact is surrounded by a first spacer layer and a second spacer layer;
• etching the first spacer layer to expose sidewalls of the second spacer layer;
• and
• performing an implantation process on the second ILD, wherein the implantation process laterally expands a first portion of the second ILD to physically contact an exposed sidewall of the second spacer layer.

A method comprising:

• forming an epitaxial source/drain region in a semiconductor fin;
• forming an isolation region over the epitaxial source/drain region;
• forming a contact on the epitaxial source/drain region, wherein an air gap separates the contact and the isolation region;
• and
• sealing the air gap, comprising implanting the isolation region with a dopant.