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US 11,901,454 B2Granted
Metal oxide semiconductor having epitaxial source drain regions and a method of manufacturing same using dummy gate process
AssigneeSony Group Corporation
InventorYasushi Tateshita
Life of this patent
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Abstract
A semiconductor device in which sufficient stress can be applied to a channel region due to lattice constant differences.
Claims32
A semiconductor device comprising:
- a substrate including silicon;
- and
- one or more PMOS transistors that include:
- a metal gate electrode component that forms at least a portion of a gate electrode and is located above the substrate;
- a first insulating film located on opposite sides of the metal gate electrode component;
- a gate insulating film located between the metal gate electrode component and the substrate, the gate insulating film formed of a material comprising a metal oxide, a metal silicate, a metal oxynitride, or a nitrided metal silicate, wherein the material includes at least one of hafnium (Hf), lanthanum (La), aluminum (Al), zirconium (Zr), or tantalum (Ta);
- a second insulating film located between the first insulating film and the metal gate electrode component;
- a source/drain located at the same vertical height as at least a portion of a silicon-based material and including a source/drain material, the source/drain material having a lattice constant different from a lattice constant of the silicon-based material, wherein the substrate comprises at least the portion of the silicon-based material;
- a portion of the source/drain is located at the same vertical height as or above a portion of the metal gate electrode component;
- a third insulating film located on opposite sides of the metal gate electrode component and of the first insulating film;
- and
- a first Ti—N film located between the metal gate electrode component and the gate insulating film, the first Ti—N film at least including titanium (Ti) and nitrogen (N).
9 more elements
Dependencies are inferred from the claim text.