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US 11,901,442 B2Granted
Method of manufacturing a semiconductor device and a semiconductor device
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsYa-Wen Chiu, Yi Che Chan, Lun-Kuang Tan, Zheng-Yang Pan, Cheng-Po Chau, Pin-Chu Liang, Hung-Yao Chen, De-Wei Yu, Yi-Cheng Li
Life of this patent
Estimating the term…
Abstract
In a method of manufacturing a semiconductor device, a fin structure having a channel region protruding from an isolation insulating layer disposed over a semiconductor substrate is formed, a cleaning operation is performed, and an epitaxial semiconductor layer is formed over the channel region. The cleaning operation and the forming the epitaxial semiconductor layer are performed in a same chamber without breaking vacuum.
Claims20
A semiconductor device comprising:
- a semiconductor fin disposed over a semiconductor substrate and extending in a first direction, the semiconductor fin including a channel region and a bottom region on which the channel region is disposed;
- a liner dielectric layer disposed on side walls of the bottom region;
- an isolation insulating layer from which the channel region protrudes and in which the bottom region is embedded;
- and
- a gate structure disposed over the channel region of the semiconductor fin and extending in a second direction crossing the first direction, wherein:
- a cap semiconductor layer is disposed on the channel region,
- a top of the liner dielectric layer is only partially covered by the cap semiconductor layer, and
- a thickness of the cap semiconductor layer on the liner dielectric layer is greater than a thickness of the cap semiconductor layer at a 50% height of the channel region.
5 more elements
A semiconductor device comprising:
- a first semiconductor fin and a second semiconductor fin disposed over a semiconductor substrate and extending in a first direction, each of the first and second semiconductor fins including a channel region and a bottom region on which the channel region is disposed;
- a liner dielectric layer disposed on side walls of the bottom region of each of the first and second semiconductor fins;
- an isolation insulating layer from which the channel region of the first and second semiconductor fins protrudes and in which the bottom region of the first and second semiconductor fins is embedded;
- and
- a first gate structure disposed over the channel region of the first semiconductor fin and a second gate structure disposed over the channel region of the second semiconductor fin, wherein:
- a cap semiconductor layer is an epitaxially formed layer and disposed on the channel region of each of the first and second semiconductor fins, and
- a top of the liner dielectric layer is only partially covered by the cap semiconductor layer at each of the first and second semiconductor fins.
4 more elements
A semiconductor device comprising:
- a first semiconductor fin and a second semiconductor fin disposed over a semiconductor substrate and extending in a first direction;
- an isolation insulating layer disposed between the first semiconductor fin and the second semiconductor fin;
- a wall fin extending in the first direction, wherein a lower portion of the wall fin is embedded in the isolation insulating layer and an upper portion of the wall fin protrudes from the isolation insulating layer;
- and
- a gate structure disposed over a channel region of the first semiconductor fin and a channel region of the second semiconductor fin and extending in a second direction crossing the first direction, wherein:
- each of the first semiconductor fin and the second semiconductor fin includes the channel region and a bottom region embedded in the isolation insulating layer and a liner dielectric layer disposed between the isolation insulating layer and the bottom region,
- the channel region is made of SiGe and further includes a Si cap layer disposed over the SiGe channel region, and
- a top of the liner dielectric layer is only partially covered by the Si cap layer.
5 more elements
Dependencies are inferred from the claim text.