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US 11,901,440 B2Granted
Sacrificial fin for self-aligned contact rail formation
AssigneeInternational Business Machines Corporation
InventorsYann Mignot, Christopher J. Waskiewicz, Su Chen Fan, Brent Anderson, Junli Wang
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Abstract
A semiconductor device containing a self-aligned contact rail is provided. The self-aligned contact rail can have a reduced critical dimension, CD. The self-aligned contact rail can be obtained utilizing a sacrificial semiconductor fin as a placeholder structure for the contact rail. The used of the sacrificial semiconductor fin enables reduced, and more controllable, CDs.
Claims20
A semiconductor device comprising:
- a functional gate structure including a first source/drain region located a first end of a semiconductor channel material structure and a second source/drain region located at a second end of the semiconductor channel material structure;
- and
- a contact rail located laterally adjacent to the functional gate structure and contacting a surface of the first source/drain region of the functional gate structure, wherein the contact rail has a lower portion having a first critical dimension and an upper portion having a second critical dimension that is greater than the first critical dimension, wherein the first critical dimension is 25 nm or less.
A semiconductor device comprising:
- a functional gate structure including a first source/drain region located a first end of a semiconductor channel material structure and a second source/drain region located at a second end of the semiconductor channel material structure;
- and
- a contact rail located laterally adjacent to the functional gate structure and contacting a surface of the first source/drain region of the functional gate structure, wherein an entirety of the contact rail has a constant critical dimension in a direction along the semiconductor channel material structure.
A method of forming a semiconductor device, the method comprising:
- forming at least one sacrificial semiconductor fin in a first region of a semiconductor substrate and at least one active semiconductor fin in a second region of the semiconductor substrate, wherein the at least one sacrificial semiconductor fin has a first critical dimension;
- forming a source/drain region on the semiconductor substrate in the first region including the at least one sacrificial semiconductor fin and the second region including the at least one active semiconductor fin;
- forming a functional gate structure in the second region and laterally adjacent to the at least one active semiconductor fin;
- forming a dielectric material stack adjacent to, and above, the at least one sacrificial semiconductor fin and the at least one active semiconductor fin;
- forming an opening in the dielectric material stack that physically exposes the at least one sacrificial semiconductor fin, wherein the opening has a second critical dimension that is greater than the first critical dimension of the at least one sacrificial semiconductor fin;
- removing the at least one sacrificial semiconductor fin to provide a contact rail opening having a lower portion having the first critical dimension and an upper portion having the second critical dimension, the contact rail opening physically exposes a surface of the source/drain region;
- and
- forming a contact rail in the contact rail opening and on the physically exposed surface of the source/drain region.
5 more elements
Dependencies are inferred from the claim text.