Non-volatile memory devices with asymmetrical floating gates
AssigneeGlobalfoundries Singapore Pte. Ltd.
InventorsShyue Seng Tan, Xinshu Cai, Eng Huat Toh
Life of this patent
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Abstract
A non-volatile memory device is provided. The non-volatile memory device includes a substrate having an active region, a source region, a drain region, and a floating gate. The source region and the drain region may be arranged in the active region, the drain region may be arranged adjacent to the source region. The source region and the drain region may define a channel region therebetween. The floating gate may be arranged over the active region, and may include a first section over the channel region, a plurality of second sections over the drain region, and a connecting section arranged between the first section and the plurality of second sections.
Claims17
A non-volatile memory device, comprising:
- a substrate having an active region;
- a source region in the active region;
- a drain region in the active region and adjacent to the source region, the drain region and the source region define a channel region therebetween;
- a floating gate over the active region, the floating gate comprises:
- a device section over the channel region;
- a plurality of coupling sections entirely over the drain region;
- and
- a connecting section between the device section and the plurality of coupling sections;
- a device well in the active region under the device section and the connecting section of the floating gate, wherein the device well has a first dopant concentration;
- and
- a coupling well in the active region and adjacent to the device well under the plurality of coupling sections of the floating gate, wherein the coupling well has a second dopant concentration lower than the first dopant concentration.
A non-volatile memory device, comprising:
- a substrate having an active region;
- a device well in the active region;
- a coupling well in the active region and adjacent to the device well;
- a source region in the device well;
- a drain region in the device well and the coupling well, and the drain region and the source region defined a channel region in the device well, wherein the drain region comprises a first drain diffusion region and a first drain lightly-doped diffusion region having a first width adjacent to the first drain diffusion region in the device well, and a second drain diffusion region and a second drain lightly-doped diffusion region adjacent to the second drain diffusion region having a second width in the coupling well, and the second width is wider than the first width;
- and
- a floating gate over the source region and the drain region, the floating gate comprises:
- a device section over the channel region;
- a plurality of coupling sections entirely over the drain region in the coupling well;
- and
- a connecting section over the device well and between the device section and the plurality of coupling sections.
A method of forming a non-volatile memory device, comprising:
- forming a device well in an active region of a substrate;
- forming a coupling well in the active region of the substrate, wherein the coupling well is adjacent to and has a lower dopant concentration than the device well;
- forming a source region and a drain region in the active region of the substrate, and the drain region and the source region define a channel region in the device well;
- and
- forming a floating gate over the active region, the floating gate comprises:
- a device section over the channel region;
- a plurality of coupling sections entirely over the drain region that is over the coupling well;
- and
- a connecting section between the device section and the plurality of coupling sections, wherein the connecting section and the device section are over the device well.
Dependencies are inferred from the claim text.