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US 11,901,345 B2Granted
Semiconductor package
AssigneeSK hynix Inc.
InventorsJeong Hyun Park, Bok Kyu Choi
Life of this patent
Estimating the term…
Abstract
A semiconductor package may include: a substrate; a first sub-semiconductor package disposed over the substrate, the first sub-semiconductor package including a first buffer chip and a first memory chip; and a second memory chip disposed over the first sub-semiconductor package, wherein the first buffer chip and the first memory chip are connected to each other using a first redistribution line, and wherein the first buffer chip and the second memory chip are connected to each other using a second bonding wire.
Claims21
A semiconductor package comprising:
- a substrate;
- a first sub-semiconductor package disposed over the substrate, the first sub-semiconductor package including a first buffer chip, a first memory chip, and a first molding layer filling a space between the first buffer chip and the first memory chip to be in direct contact with side surfaces of the first buffer chip and a first memory chip;
- and
- a second memory chip disposed over the first sub-semiconductor package,
- wherein the first buffer chip and the substrate are connected to each other using a first bonding wire, wherein the first buffer chip and the first memory chip are connected to each other using a first redistribution line, and
- wherein the first buffer chip and the second memory chip are connected to each other using a second bonding wire.
3 more elements
A semiconductor package comprising:
- a buffer chip having a first side surface facing a memory chip and a second side surface located opposite to the first side surface, the buffer chip including a first internal channel pad and an external channel pad which are sequentially arranged from the first side surface;
- the memory chip disposed at one side of the buffer chip to be spaced apart from the buffer chip, the memory chip including a memory chip pad which is connected to the first internal channel pad by a redistribution line;
- and
- a molding layer filling a space between the buffer chip and the memory chip,
- wherein a distance between the first side surface and the first internal channel pad is greater than a distance between the external channel pad and the second side surface.
2 more elements
Dependencies are inferred from the claim text.