Semiconductor package with routing patch and conductive interconnection structures laterally displaced from routing patch

An electronic device, comprising:

• a substrate comprising a substrate top side and a substrate bottom side;
• a first semiconductor die comprising a first die top side and a first die bottom side, wherein the first die bottom side is coupled to the substrate top side;
• a second semiconductor die comprising a second die top side and a second die bottom side, wherein the second die bottom side is coupled to the substrate top side;
• a routing patch comprising a patch top side, a patch bottom side, and patch contacts along the patch top side, wherein:
• the patch contacts protrude above the patch top side and couple the patch top side to the substrate bottom side;
• and
• the routing patch comprises signal paths between the patch contacts that couple the first semiconductor die to the second semiconductor die;
• and
• conductive interconnection structures coupled to the substrate bottom side;
• and
• wherein the conductive interconnection structures laterally surround the routing patch;
• wherein the routing patch comprises back-end-of-the-line interconnection layers and redistribution layers on a top side of the back-end-of-the-line interconnection layers;
• wherein the back-end-of-the-line interconnection layers comprises one or more layers of inorganic dielectric material;
• wherein the redistribution layers comprises one or more layers of organic dielectric material;
• and
• wherein the patch top side comprises a top side of the redistribution layers.