Back to results
US 11,901,257 B2Granted
Semiconductor package, metal sheet for use in a semiconductor package, and method for producing a semiconductor package
AssigneeInfineon Technologies AG
InventorsThomas Stoek, Michael Stadler
Life of this patent
Estimating the term…
Abstract
A semiconductor package includes a semiconductor chip, an encapsulation body encapsulating the semiconductor chip, and a metal sheet having a first sheet surface and an opposite second sheet surface. The first sheet surface is exposed at the encapsulation body. The semiconductor chip is arranged at the second sheet surface. The first sheet surface has a pattern having first subdivisions having a first average roughness and second subdivisions having a second average roughness. The first average roughness is greater than the second average roughness.
Claims23
A semiconductor package, comprising:
- a semiconductor chip;
- an encapsulation body encapsulating the semiconductor chip;
- a metal sheet having a first sheet surface and an opposite second sheet surface, the first sheet surface has a pattern having first subdivisions having a first average roughness and second subdivisions having a second average roughness;
- and
- an electrolytic layer applied on the pattern,
- wherein the first sheet surface is exposed at the encapsulation body,
- wherein the semiconductor chip is arranged at the second sheet surface,
- wherein the first average roughness is greater than the second average roughness,
- wherein the maximum depth of the electrolytic layer is 18 μm or less.
6 more elements
A semiconductor package, comprising:
- a semiconductor chip;
- an encapsulation body encapsulating the semiconductor chip;
- and
- a metal sheet having a first sheet surface and an opposite second sheet surface,
- wherein the first sheet surface is exposed at the encapsulation body,
- wherein the semiconductor chip is arranged at the second sheet surface,
- wherein the first sheet surface has a pattern having first subdivisions having a first average roughness and second subdivisions having a second average roughness,
- wherein the first average roughness is greater than the second average roughness,
- wherein the first subdivisions have an edge length of 1.5 mm or less.
6 more elements
A semiconductor package, comprising:
- a semiconductor chip;
- an encapsulation body encapsulating the semiconductor chip;
- and
- a metal sheet having a first sheet surface and an opposite second sheet surface,
- wherein the first sheet surface is exposed at the encapsulation body,
- wherein the semiconductor chip is arranged at the second sheet surface,
- wherein the first sheet surface has a pattern having first subdivisions having a first average roughness and second subdivisions having a second average roughness,
- wherein the first average roughness is greater than the second average roughness,
- wherein the first sheet surface is exposed at a first surface of the encapsulation body, the semiconductor package further comprising:
- external contacts arranged at a second surface of the encapsulation body, the second surface being situated opposite the first surface.
7 more elements
A semiconductor package, comprising:
- a semiconductor chip;
- an encapsulation body encapsulating the semiconductor chip;
- and
- a metal sheet having a first sheet surface and an opposite second sheet surface,
- wherein the first sheet surface is exposed at the encapsulation body,
- wherein the semiconductor chip is arranged at the second sheet surface,
- wherein the first sheet surface has a pattern having first subdivisions having a first average roughness and second subdivisions having a second average roughness,
- wherein the first average roughness is greater than the second average roughness,
- wherein the pattern is completely surrounded by an edge of the first sheet surface,
- wherein the edge has a minimum width of at least 0.2 mm,
- wherein the edge has the second average roughness.
8 more elements
A semiconductor package, comprising:
- a semiconductor chip;
- an encapsulation body encapsulating the semiconductor chip;
- and
- a metal sheet having a first sheet surface and an opposite second sheet surface,
- wherein the first sheet surface is exposed at the encapsulation body,
- wherein the semiconductor chip is arranged at the second sheet surface,
- wherein the first sheet surface has a pattern having first subdivisions having a first average roughness and second subdivisions having a second average roughness,
- wherein the first average roughness is greater than the second average roughness,
- wherein the pattern is completely surrounded by an edge of the first sheet surface,
- wherein the edge has a minimum width of at least 0.2 mm,
- wherein the edge has the second average roughness,
- wherein the maximum width of the edge is 1.5 mm or less.
9 more elements
Dependencies are inferred from the claim text.