Self-aligned scheme for semiconductor device and method of forming the same

A method comprising:

• forming a first conductive feature and a second conductive feature in a first dielectric layer, an exposed surface of the first conductive feature comprising a first capping layer, an exposed surface of the second conductive feature comprising a second capping layer;
• forming a blocking layer over the first conductive feature and the second conductive feature, the blocking layer having a greater deposition selectivity over the first conductive feature and the second conductive feature than over the first dielectric layer, the blocking layer comprising hydrophilic groups and hydrophobic groups;
• forming a multilayer dielectric over the first dielectric layer and laterally displaced from the blocking layer, the multilayer dielectric comprising a low-k dielectric layer disposed over the first dielectric layer and a high-k dielectric layer disposed over the low-k dielectric layer;
• flowing a reacting gas to remove the blocking layer;
• depositing an etch stop layer over the high-k dielectric layer;
• depositing a second dielectric layer over the etch stop layer;
• forming a trench in the second dielectric layer and the etch stop layer, the forming the trench comprising exposing the first conductive feature and the high-k dielectric layer;
• and
• forming a third conductive feature in the trench.

A method comprising:

• forming a first conductive feature in a first dielectric layer, a top surface of the first conductive feature being above a top surface of the first dielectric layer, forming the first conductive feature comprising:
• forming a conductive material in the first dielectric layer;
• and
• forming a capping layer over the conductive material;
• depositing a blocking layer along the top surface of the first conductive feature, a molecule of the blocking layer comprising a hydrophilic head group and a hydrophobic tail group;
• depositing a low-k dielectric layer along the top surface of the first dielectric layer, a top surface of the low-k dielectric layer being above the top surface of the first conductive feature;
• depositing a high-k dielectric layer over the low-k dielectric layer;
• removing the blocking layer;
• forming a second dielectric layer over the high-k dielectric layer;
• etching an opening in the second dielectric layer to expose the first conductive feature;
• and
• forming a second conductive feature in the opening.