Method for improved critical dimension uniformity in a semiconductor device fabrication process

A method comprising:

• forming a device layer over a substrate;
• forming a material layer over the device layer;
• forming a protector layer over the material layer, wherein a first portion of the material layer is exposed by the protector layer after the forming of the protector layer over the material layer;
• forming a first patterned material layer over the protector layer, wherein the first portion of the material layer is exposed by the first patterned material layer;
• removing the first portion of the material layer;
• removing the first patterned material layer;
• forming a second patterned material layer over the protector layer, wherein a second portion of the material layer is exposed by the second patterned material layer after the forming of the second patterned material layer over the protector layer;
• removing the second portion of the material layer;
• removing the second patterned material layer;
• and
• patterning the device layer while using the material layer as a mask.

A method comprising:

• forming a device layer over a substrate;
• forming a material layer over the device layer;
• forming a protector layer over the material layer;
• forming a spacer layer on the protector layer;
• removing the protector layer to expose a first portion of the material layer;
• forming a first patterning layer over the spacer layer, the first patterning layer defining an opening that exposes a first portion of the spacer layer and the first portion of the material layer;
• and
• removing the first portion of the material layer to expose a first portion of the device layer.