Nonvolatile memory device performing incremental step pulse program operation and operating method thereof

A nonvolatile memory device comprising:

• a plurality of memory cells coupled between a plurality of word lines and a plurality of bit lines;
• a peripheral circuit suitable for performing program loops each including a program operation and a verification operation, the program operation including a setup operation on the plurality of bit lines and an application operation of applying a program pulse to a selected word line and the verification operation including applying a verification voltage to the selected word line;
• and
• a control logic circuit suitable for controlling the peripheral circuit to repeatedly perform the program loops until programming for the selected word line is completed,
• wherein the peripheral circuit performs a first program loop of the program loops by:
• applying a first program pulse to the selected word line in a first section of the application operation,
• applying a second program pulse to the selected word line in a second section of the application operation,
• setting a first bit line group to a first voltage level and a second bit line group to a second voltage level lower than the first voltage level from a start of the setup operation until an end of the first section of the application operation, and
• resetting the first bit line group and the second bit line group to the second voltage level in the second section of the application operation.