Sense amplifier structure for non-volatile memory with neighbor bit line local data bus data transfer

A method, comprising:

• pre-charging a first sense node of a sense amplifier circuit;
• discharging the first sense node through a first bit line at a rate dependent upon a conduction state of a first selected memory cell along the first bit line;
• after discharging the first sense node through the first selected memory cell for a sensing interval, capacitively storing, on a first local data bus of the sense amplifier circuit, a sensed value based on a resultant charge level on the first sense node, the sense amplifier including a first plurality of data latches connected to the first local data bus;
• subsequent to setting the sensed value on the first local data bus, performing, on a second local data bus of the sense amplifier circuit, a first plurality of logical operations between the sensed value and values latched in the first plurality of data latches, the sense amplifier circuit including a second plurality of data latches connected to the second local data bus and a second sense node, the second sense node connectable to a second bit line and connectable to the second local data bus and configured to capacitively store a sensed value on the second local data bus based on discharging the second sense node through the second bit line, performing the first plurality of logical operations including:
• transferring one or more of the values latched in the first plurality of data latches between the first local data bus and the second local data bus;
• performing one or more of the plurality of logical operation using the second plurality of data latches;
• and
• transferring a result of the one or more of the plurality of logical operation using the second plurality of data latches to the first local data bus;
• and
• concurrently with performing the first plurality of logical operations, pre-charging the first sense node for a second sensing operation,
• subsequent to capacitively storing the first sensed value on the first local data bus, perform a plurality of logical operations between the first sensed value and values latched in the first plurality of data latches, where to perform the plurality of logical operations the control circuit is configured to:
• transfer one or more of the values latched in the first plurality of data latches to the second local data bus over the connection circuit;
• perform one or more of the plurality of logical operation using the second plurality of data latches;
• and
• transfer a result of the one or more of the plurality of logical operation using the second plurality of data latches over the connection circuit to the first local data bus;
• and
• concurrently with performing the plurality of logical operations, pre-charge the first sense node for a second sensing operation.

A sense amplifier circuit, comprising:

• first and second sensing nodes respectively connectable to first and second bit lines of an array of non-volatile memory cells;
• first and second pre-charge circuits respectively connectable to the first and second sensing nodes and configured to pre-charge the respective first and second sensing nodes;
• first and second local data buses respectively connectable to the first and second sensing nodes and configured to hold a corresponding sensed data state based a voltage level on the first and second sensing nodes, respectively;
• first and second pluralities of data latches respectively connected to the first and second local data buses;
• a connection circuit connected to the first and second local data buses bused and configured to transfer values latched in the first plurality of data latches to the second local data bus and to transfer values latched in the second plurality of data latches to the first local data bus;
• and
• one or more control circuits connected to the first and second pluralities of data latches, first and second pre-charge circuits, and the connection circuit, the one or more control circuits configured to:
• transfer, over the connection circuit from the first local data bus to the second local data bus, a sensed value from a first sensing operation capacitively stored on the first local data bus and one or more of the values stored in the first plurality of data latches;
• perform a first set of logical operations between the sensed value from the first sensing operation and the values stored in the first plurality of data latches using the second plurality of data latches;
• and
• transfer a result of the first set of logical operation using the second plurality of data latches over the connection circuit to the first local data bus;
• and
• concurrently with performing the first set of logical operations, pre-charge the first sense node for a second sensing operation.