Three-dimensional flash memory and operation method therefor
AssigneeSamsung Electronics Co., Ltd.
InventorYunheub Song
Life of this patent
Estimating the term…
Abstract
A three-dimensional flash memory is disclosed. According to one embodiment, the three-dimensional flash memory has a structure in which a boosting area is reduced, a structure to which a small block is applied, a structure to which a COP is applied and in which a wiring process is simplified, or a structure to which symmetrical U-shaped BiCS are applied.
Claims20
A three-dimensional (3D) flash memory to which a small block is applied, the 3D flash memory comprising:
- a plurality of memory cell strings formed on a substrate to each extend in one direction, each memory cell string comprising a channel layer and a charge storage layer surrounding the channel layer;
- a plurality of word lines connected to the plurality of memory cell strings and stacked in a vertical direction, the plurality of word lines being grouped into a plurality of word line sets, the plurality of word line sets respectively corresponding to a plurality of small blocks into which vertical-direction memory regions of the at least one memory cell string are grouped;
- and
- at least one switching element connected to a word line wiring configured to control word line sets of the plurality of word lines, the word line wiring and at least one switching element being configured to selectively apply a voltage to any one word line set of the plurality of word line sets.
A three-dimensional (3D) flash memory comprising:
- at least one string formed in a U shape to include a horizontal portion and vertical portions with respect to a substrate, the at least one string comprising a charge storage layer formed to extend in a hollow tube form and a channel layer filling an inside of the charge storage layer;
- a plurality of word lines orthogonal to and connected to the vertical portions of the at least one string;
- and
- two bit lines formed to extend parallel to the horizontal portion of the at least one string, the two bit lines being connected to two ends of a first string of the at least one string.
A operating method of a 3D flash memory including at least one string formed in a U shape to include a horizontal portion and vertical portions with respect to a substrate, the at least one string including a charge storage layer formed to extend in a hollow tube form and a channel layer filling an inside of the charge storage layer;
- a plurality of word lines orthogonal to and connected to the vertical portions of the at least one string;
- and two bit lines formed to extend parallel to the horizontal portion of the at least one string, the two bit lines being connected to two ends of the at least one string, the operating method comprising:
- determining whether each of the two bit lines will be used as either a drain line or a source line, based on required voltages to be applied to the two ends of the at least one string, depending on which of a program operation, an erase operation, and a read operation is to be performed;
- and
- applying voltages to the two ends of the at least one string through the two bit lines based on the result of determining whether each of the two bit lines will be used as either the drain line or the source line,
- wherein a word line located adjacent to an upper portion of a horizontal portion of the at least one string, from among the plurality of word lines, is used as a MSL (Middle Signal Line).
Dependencies are inferred from the claim text.