Shiftable memory and method of operating a shiftable memory

A method of operating a shiftable memory, the method comprising the steps of:

• providing a shiftable memory comprising:
• a plurality of memory cells arranged in rows and columns wherein the memory cells of the rows are interconnected, thereby forming chains of memory cells;
• at least one first serial output data port;
• output data logic for connecting an output of any of the chains of memory cells to the first serial output data port, or at least one first parallel output data port and at least one read shift register configured for serially collecting serial output data from the output of any of the chains of memory cells;
• and/or
• at least one first serial input data port;
• input data logic for connecting the first serial input data port to an input of any of the chains of memory cells or at least one parallel, input data port and at least one write shift register for serially shifting input data to the input of any of the chains of memory cells;
• and
• a controller configured to control the shifting of the data in the chains of memory cells, the controller further configured to control the output data logic and/or the input data logic;
• wherein the shiftable memory is operational without bit lines interconnecting the memory cells within the columns;
• shifting data of at least one row of the shiftable memory;
• and
• reading shifted data sequentially from a first serial output data port of the shiftable memory connected to an output of any of the chains of memory cells, or shifting data sequentially to an internal read shift register and reading data from the internal read shift register through a parallel output data port, or writing data sequentially to a first serial input port of the shiftable memory connected to an input of any of the chains of memory cells, or writing data from a parallel input data port to an internal write shift register and shifting data sequentially from the internal write shift register to an input of any of the chains of memory cells.