Memory cycling tracking for threshold voltage variation systems and methods
AssigneeMicron Technology, Inc.
InventorHari Giduturi
Life of this patent
Estimating the term…
Abstract
A memory system may include multiple memory cells to store logical data and cycle tracking circuitry to track a number of cycles associated the memory cells. The cycles may be representative of one or more past accesses of the memory cells. The memory system may also include control circuitry to access the memory cells. Accessing of the memory cell may include a read operation, a write operation, or both. During the accessing of the memory cell, the control circuitry may determine a voltage parameter of the access based at least in part on the tracked number of cycles.
Claims20
A memory device comprising:
- a memory array comprising a plurality of memory cells;
- a first cycle count register configured to track a first cycle count value representative of a first number of past accesses of a first set of the plurality of memory cells;
- and
- cycle tracking circuitry configured to increase the first cycle count value of the first cycle count register in response to a first access of a first memory cell of the first set of the plurality of memory cells.
A method comprising:
- assigning, via cycle tracking circuitry, a first memory block with a first plurality of memory addresses corresponding to a first plurality of memory cells of a memory device, wherein the first memory block is associated with a first cycle count register configured to track a first cycle count value representative of a first number of past accesses of the first plurality of memory cells;
- and
- assigning, via the cycle tracking circuitry, a second memory block with a second plurality of memory addresses corresponding to a second plurality of memory cells of the memory device, wherein the second memory block is associated with a second cycle count register configured to track a second cycle count value representative of a second number of past accesses of the second plurality of memory cells;
- and
- in response to a request to access a memory cell of the first plurality of memory cells, retrieving the first cycle count value from first cycle count register.
A computing system comprising:
- a memory device comprising a plurality of memory cells;
- one or more processors commutatively coupled to the memory device and configured to request one or more accesses of the plurality of memory cells;
- and
- cycle tracking circuitry configured to maintain cycle count values representative of a history of the one or more accesses to the plurality of memory cells.
Dependencies are inferred from the claim text.