Wordline modulation techniques
AssigneeArm Limited
InventorsRajiv Kumar Sisodia, Andy Wangkun Chen, Sriram Thyagarajan, Yew Keong Chong, Ayush Kulshrestha, Munish Kumar
Life of this patent
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Abstract
Various implementations described herein are related to a method for accessing a bitcell in an array of bitcells with a wordline and a bitline. The method may perform a precharge operation on the bitline that precharges the bitline after a read cycle and before a write cycle. Also, the method may extend precharge time of the precharge operation between the read cycle and the write cycle, e.g., by modulating a wordline signal on the wordline with early cut-off of the wordline signal on the wordline during the read cycle.
Claims20
A method comprising:
- accessing a bitcell in an array of bitcells with a wordline and a bitline;
- performing a precharge operation on the bitline with a bitline precharge signal that precharges the bitline after a read cycle and before a write cycle;
- and
- extending precharge time of the precharge operation between the read cycle and the write cycle by modulating a wordline signal on the wordline with early cut-off of the wordline signal on the wordline during the read cycle,
- wherein modulating the wordline signal is based on an early reset signal having a falling edge at a beginning of the early reset signal that triggers a falling edge of the wordline signal during the read cycle, and
- wherein the falling edge of the wordline signal triggers a falling edge of the bitline precharge signal.
A method comprising:
- accessing a bitcell in an array of bitcells with a wordline and a bitline;
- performing a precharge operation on the bitline with a bitline precharge signal that precharges the bitline after a read cycle and before a write cycle;
- and
- extending precharge time of the precharge operation between the read cycle and the write cycle by modulating a wordline signal on the wordline with early cut-off of the wordline signal on the wordline during the read cycle,
- wherein modulating the wordline signal is based on an early reset signal and a delayed clock signal,
- wherein extending the precharge time of the precharge operation provides for early precharge of the bitline after the read cycle and before the write cycle,
- wherein a falling edge at a beginning of the early reset signal triggers a falling edge of the wordline signal during the read cycle,
- wherein the falling edge of the wordline signal triggers a falling edge of the bitline precharge signal, and
- wherein a rising edge of the delayed clock signal triggers a rising edge of the wordline signal during the write cycle.
A device comprising:
- a wordline driver that accesses a bitcell with a wordline and a bitline;
- an input-output circuit that performs a precharge operation on the bitline with use of a bitline precharge signal to precharge the bitline after a read cycle and before a write cycle;
- and
- a wordline modulator that extends precharge time of the precharge operation between the read cycle and the write cycle by modulating a wordline signal on the wordline with early cut-off of the wordline signal on the wordline during the read cycle,
- wherein the wordline modulator modulates the wordline signal based on an early reset signal having a falling edge at a beginning of the early reset signal that directly triggers a falling edge of the wordline signal during the read cycle, and
- wherein the falling edge of the wordline signal triggers a falling edge of the bitline precharge signal.
A method comprising:
- providing first circuitry that is configured to access a bitcell in an array of bitcells with a wordline and a bitline;
- providing second circuitry that is configured to perform a precharge operation on the bitline with a bitline precharge signal that precharges the bitline after a read cycle and before a write cycle;
- and
- providing third circuitry that is configured to extend precharge time of the precharge operation between the read cycle and the write cycle by modulating a wordline signal on the wordline with early cut-off of the wordline signal on the wordline during the read cycle,
- wherein modulating the wordline signal is based on an early reset signal having a falling edge at a beginning of the early reset signal that triggers a falling edge of the wordline signal during the read cycle, and
- wherein the falling edge of the wordline signal triggers a falling edge of the bitline precharge signal.
Dependencies are inferred from the claim text.