Systems and methods for improving performance of an analog processor

A method of operation of a hybrid computing system that comprises an analog processor and at least one digital processor, the analog processor and the at least one digital processor communicatively coupled to one another, the analog processor comprising a plurality of analog devices, the plurality of analog devices characterized by values of at least one programmable parameter, the at least one programmable parameter programmable by the at least one digital processor, the method comprising:

• embedding, by the at least one digital processor, a computational problem on the analog processor to generate an embedded problem having one or more symmetries;
• causing, by the at least one digital processor, a first repeated running of the embedded problem on the analog processor to generate a first plurality of candidate solutions to the computational problem;
• receiving, by the at least one digital processor, the first plurality of candidate solutions to the computational problem;
• determining, by the at least one digital processor, a value for at least one statistical feature of the first plurality of candidate solutions to the computational problem;
• adjusting, by the at least one digital processor, the values of the at least one programmable parameter of the plurality of analog devices in the analog processor to at least partially compensate for deviations from an expected value of the at least one statistical feature, the expected value of the at least one statistical feature inferred from the one or more symmetries of the embedded problem;
• and
• causing, by the at least one digital processor, a second repeated running of the embedded problem on the analog processor to generate a second plurality of candidate solutions to the computational problem.