Marker-based processor instruction grouping

A method for executing instructions by parallel processing units of a processor, the method comprising:

• for a first window of time, characterizing sets of instructions executed by a processor pipeline having the parallel processing units;
• determining and applying, based on the characterizing, a set limit comprising a number of instructions to be executed at the processor pipeline during a second window of time subsequent in time to the first window of time;
• and
• based on the determined set limit, provisioning sets of instructions to be executed at the processor pipeline during the second window of time.

A processing unit comprising:

• a command processor configured to receive instructions for execution from a software application;
• a processor pipeline having a set of parallel processing units for executing the instructions;
• and
• a set manager coupled to one or more of the processor pipeline and the command processor, wherein the set manager is configured to:
• determine an execution time for a set of instructions of a first window of sets of instructions submitted to the processor pipeline during a first window of time based on at least one of a set start time, a set end time, and a set execution time;
• determine and apply a set limit comprising a number of instructions to be executed at the processor pipeline during a second window of time subsequent to the first window of time based on the execution time of at least one set of instructions of the first window;
• and
• provision a set of instructions to be executed at the processor pipeline during the second window of time based on the set limit.