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US 11,900,039 B2Granted
Multi-input logic circuitry
AssigneeArm Limited
InventorsAnil Kumar Baratam, Jr., Subramanya Ravindra Shindagikar
Life of this patent
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Abstract
Various implementations described herein refer to an integrated circuit having multiple stages including a first stage, a second stage, and a third stage. The first stage has first logic structures coupled in series, and the first logic structures are activated with multiple signals. The second stage has second logic structures coupled in parallel, and the second logic structures are activated with the multiple signals. The third stage has a first input, a second input, and an output. The first input is coupled to the first stage, the second input is coupled to the second stage, and the output provides an output signal based on the multiple signals.
Claims16
A method comprising:
- fabricating first multi-stage logic with a first stage, a second stage and a third stage, wherein the first stage and the second stage are activated with first signals, wherein the third stage has a first input coupled to the first stage, a second input coupled to the second stage, and a first output that provides a first output signal based on the first signals;
- and
- fabricating second multi-stage logic with a fourth stage, a fifth stage and a sixth stage, wherein the fourth stage and the fifth stage are activated with second signals and the first output signal, wherein the sixth stage has a third input coupled to the fourth stage, a fourth input coupled to the fifth stage, and a second output that provides a second output signal based on the second signals and the first output signal,
- wherein the second output signal refers to an XOR logic output signal or an XNOR logic output signal.
1 more element
A method comprising:
- fabricating first multi-stage logic with a first stage, a second stage and a third stage, wherein the first stage and the second stage are activated with first signals, wherein the third stage has a first input coupled to the first stage, a second input coupled to the second stage, and a first output that provides a first output signal based on the first signals;
- fabricating second multi-stage logic with a fourth stage, a fifth stage and a sixth stage, wherein the fourth stage and the fifth stage are activated with second signals and the first output signal, wherein the sixth stage has a third input coupled to the fourth stage, a fourth input coupled to the fifth stage, and a second output that provides a second output signal based on the second signals and the first output signal;
- operating the first multi-stage logic in combination with the second multi-stage logic as an XOR gate such that the second output from the second multi-stage logic provides the second output signal as an XOR logic output signal;
- the first signals and the second signals refer to multiple XOR input signals;
- and
- the XOR logic output signal is based on the multiple XOR input signals.
3 more elements
A method comprising:
- fabricating first multi-stage logic with a first stage, a second stage and a third stage, wherein the first stage and the second stage are activated with first signals, wherein the third stage has a first input coupled to the first stage, a second input coupled to the second stage, and a first output that provides a first output signal based on the first signals;
- fabricating second multi-stage logic with a fourth stage, a fifth stage and a sixth stage, wherein the fourth stage and the fifth stage are activated with second signals and the first output signal, wherein the sixth stage has a third input coupled to the fourth stage, a fourth input coupled to the fifth stage, and a second output that provides a second output signal based on the second signals and the first output signal;
- operating the first multi-stage logic in combination with the second multi-stage logic as an XNOR gate such that the second output from the second multi-stage logic provides the second output signal as an XNOR logic output signal;
- the first signals and the second signals refer to multiple XNOR input signals;
- the XNOR logic output signal is based on the multiple XNOR input signals.
2 more elements
A circuit comprising:
- first logic having first transistors coupled in series and activated with first signals, second transistors activated with the first signals, and third transistors configured with a first input coupled to the first transistors, a second input coupled to the second transistors, and a first output that provides a first output signal based on the first signals;
- and
- second logic having fourth transistors coupled in series and activated with second signals including the first output signal, fifth transistors coupled in parallel and activated with the second signals including the first output signal, and sixth transistors configured with a third input coupled to the fourth transistors, a fourth input coupled to the fifth transistors, and a second output that provides a second output signal based on the second signals including the first output signal,
- wherein the second output signal refers to an XOR logic output signal or an XNOR logic output signal.
1 more element
A circuit comprising:
- first logic having first transistors coupled in series and activated with first signals, second transistors activated with the first signals, and third transistors configured with a first input coupled to the first transistors, a second input coupled to the second transistors, and a first output that provides a first output signal based on the first signals;
- and
- second logic having fourth transistors coupled in series and activated with second signals including the first output signal, fifth transistors coupled in parallel and activated with the second signals including the first output signal, and sixth transistors configured with a third input coupled to the fourth transistors, a fourth input coupled to the fifth transistors, and a second output that provides a second output signal based on the second signals including the first output signal,
- wherein the circuit operates as an XOR gate such that the second output from the second logic provides the second output signal as an XOR logic output signal, and
- wherein a combination of the first signals and the second signals refer to multiple XOR input signals, and
- wherein the XOR logic output signal is based on the multiple XOR input signals.
3 more elements
A circuit comprising:
- first logic having first transistors coupled in series and activated with first signals, second transistors activated with the first signals, and third transistors configured with a first input coupled to the first transistors, a second input coupled to the second transistors, and a first output that provides a first output signal based on the first signals;
- and
- second logic having fourth transistors coupled in series and activated with second signals including the first output signal, fifth transistors coupled in parallel and activated with the second signals including the first output signal, and sixth transistors configured with a third input coupled to the fourth transistors, a fourth input coupled to the fifth transistors, and a second output that provides a second output signal based on the second signals including the first output signal,
- wherein the circuit operates as an XNOR gate such that the second output from the second logic provides the second output signal as an XNOR logic output signal,
- wherein a combination of the first signals and the second signals refer to multiple XNOR input signals, and
- wherein the XNOR logic output signal is based on the multiple XNOR input signals.
3 more elements
A circuit comprising:
- a first stage having first logic devices arranged for activation with a first input signal and a second input signal, wherein the first stage provides a first output signal based on the first input signal and the second input signal;
- and
- a second stage having second logic devices arranged for activation with a third input signal and the first output signal, wherein the second stage provides a second output signal based on the third input signal and the first output signal, wherein the second output signal refers to an XOR output signal,
- wherein the first stage and the second stage are coupled together to operate as a multi-input XOR gate that provides the XOR output signal as a single XOR output signal based on the first input signal, the second input signal and the third input signal.
1 more element
Dependencies are inferred from the claim text.