Method and apparatus for performing access management of memory device with aid of serial number assignment timing control

A memory device, comprising:

• a non-volatile (NV) memory, configured to store information, wherein the NV memory comprises at least one NV memory elements, and the at least one NV memory element comprises a plurality of blocks;
• and
• a controller, coupled to the NV memory, configured to control operations of the memory device, wherein the controller comprises:
• a processing circuit, configured to control the controller according to a plurality of host commands from a host device, to allow the host device to access the NV memory through the controller;
• wherein:
• the controller manages a plurality of spare blocks with a spare pool, wherein the plurality of blocks comprise the plurality of spare blocks;
• the controller pops a first block from the spare pool to be a host data block, and performs a set of first subsequent operations on the host data block including assigning a serial number to the host data block, wherein the host data block is arranged to receive data from the host device, and serial number assignment of the host data block corresponds to a timing of fully programing the host data block since the first block is popped from the spare pool to be the host data block, and the serial number assigned to the host data block indicates a rank of the host data block among a plurality of data blocks for further use in sudden power off recovery (SPOR), wherein the plurality of blocks comprise the plurality of data blocks;
• and
• the controller pops a second block from the spare pool to be a garbage collection (GC) destination block, and performs a set of second subsequent operations on the GC destination block including assigning a serial number to the GC destination block, wherein the GC destination block is arranged to receive data from a GC source block during a GC procedure, and serial number assignment of the GC destination block corresponds to a timing of starting using the GC destination block since the second block is popped from the spare pool to be the GC destination block, and the serial number assigned to the GC destination block indicates a rank of the GC destination block among the plurality of data blocks for further use in the SPOR.

A controller of a memory device, the memory device comprising the controller and a non-volatile (NV) memory, the NV memory comprising at least one NV memory element, the at least one NV memory element comprising a plurality of blocks, the controller comprising:

• a processing circuit, configured to control the controller according to a plurality of host commands from a host device, to allow the host device to access the NV memory through the controller;
• wherein:
• the controller manages a plurality of spare blocks with a spare pool, wherein the plurality of blocks comprise the plurality of spare blocks;
• the controller pops a first block from the spare pool to be a host data block, and performs a set of first subsequent operations on the host data block including assigning a serial number to the host data block, wherein the host data block is arranged to receive data from the host device, and serial number assignment of the host data block corresponds to a timing of fully programing the host data block since the first block is popped from the spare pool to be the host data block, and the serial number assigned to the host data block indicates a rank of the host data block among a plurality of data blocks for further use in sudden power off recovery (SPOR), wherein the plurality of blocks comprise the plurality of data blocks;
• and
• the controller pops a second block from the spare pool to be a garbage collection (GC) destination block, and performs a set of second subsequent operations on the GC destination block including assigning a serial number to the GC destination block, wherein the GC destination block is arranged to receive data from a GC source block during a GC procedure, and serial number assignment of the GC destination block corresponds to a timing of starting using the GC destination block since the second block is popped from the spare pool to be the GC destination block, and the serial number assigned to the GC destination block indicates a rank of the GC destination block among the plurality of data blocks for further use in the SPOR.