Storage system and method to perform workload associated with a host
AssigneeSamsung Electronics Co., Ltd.
InventorsWonseb Jeong, Hee Hyun Nam, Younggeon Yoo, Jeongho Lee, Younho Jeon, Ipoom Jeong, Chanho Yoon
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Abstract
A memory device includes; a first memory of first type, a second memory of second type different from the first type, and a memory controller. The memory controller receives an access request and workload information related to work of an external processor, processes the access request using the workload information, and accesses at least one of the first memory and the second memory in response to the access request.
Claims18
A memory device comprising:
- a first memory of a first type;
- a second memory of a second type different from the first type;
- and
- a memory controller configured to
- receive a plurality of access requests and workload information related to work of a processor external to the memory device, wherein the plurality of access requests comprise a plurality of first access requests and a plurality of second access requests, wherein the workload information includes at least one calculation type identifier (ID),
- schedule, using the at least one calculation type ID, the plurality of first access requests and the plurality of second access requests such that the plurality of first access requests are individually processed and the plurality of second access requests are continuously processed,
- process the plurality of access requests using the workload information, and
- access at least one of the first memory and the second memory in response to the plurality of access requests.
An operating method for a memory device including a first memory of a first type and a second memory of a second type different from the first type, the method comprising:
- providing capacity information of the first memory and capacity information of the second memory to a processor external to the memory device;
- receiving address allocation information of the first memory and address allocation information of the second memory from the processor;
- receiving a plurality of access requests for at least one of the first memory and the second memory from the processor;
- receiving workload information for work of the processor associated with the plurality of access requests;
- and
- processing the plurality of access requests using the workload information.
An electronic device comprising:
- processors, memory devices, and a switch configured to connect the processors and the memory devices,
- wherein at least one of the memory devices includes:
- a first memory of a first type;
- a second memory different of a second type different from the first type;
- and
- a memory controller configured to
- receive a plurality of access requests from at least one of the processors through the switch,
- receive workload information from the at least one of the processors, wherein the workload information includes at least one latency/throughput requirement associated with the plurality of access requests,
- process the plurality of access requests using the workload information, and
- access at least one of the first memory and the second memory using the plurality of access requests,
- wherein the memory controller outputs latency/busy information for at least one of the processors, and at least one of the processors performs scheduling of work using the latency/busy information, and
- wherein the memory controller is further configured to count elapsed latencies after receipt of the plurality of access requests.
Dependencies are inferred from the claim text.