Vector processor data storage
AssigneeLightmatter, Inc.
InventorsNicholas Moore, Gongyu Wang, Bradley Dobbie, Tyler J. Kenney, Ayon Basumallik
Life of this patent
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Abstract
Aspects of the present disclosure provide an aligned storage strategy for stripes within a long vector for a vector processor, such that the extra computation needed to track strides between input stripes and output stripes may be eliminated. As a result, the stripe locations are located in a more predictable memory access pattern such that memory access bandwidth may be improved and the tendency for memory error may be reduced.
Claims20
A device comprising:
- a vector processor configured to:
- receive as an input one of a first vector and a second vector,
- provide as an output, based at least in part on the input, the other one of the first vector and the second vector wherein the second vector is longer than the first vector and
- split the second vector into a plurality of stripes;
- and
- one or more computer memory units implementing a buffer comprising a plurality of lines, configured to store the second vector in the plurality of stripes, wherein a first stripe of the plurality of stripes and a second stripe of the plurality of stripes are aligned in the buffer on separate lines of the plurality of lines.
A method to store input and output vectors for a vector processor in one or more computer memory units implementing a buffer, the method comprising:
- receiving, by the vector processor, one of a first vector and a second vector as input to the vector processor;
- providing, with the vector processor, the other one of the first vector and second vector as output of the vector processor, wherein the second vector is longer than the first vector;
- splitting, with the vector processor, the second vector into a plurality of stripes;
- and
- storing the second vector in the plurality of stripes in the buffer, wherein the buffer comprises a plurality of lines and storing comprises:
- aligning a first stripe of the plurality of stripes and a second stripe of the plurality of stripes by storing the first and second stripes on separate lines of the plurality of lines.
A system comprising at least one processor and at least one computer-readable storage medium having stored thereon instructions which, when executed, program the at least one processor to perform a method for storing input and output vectors of a vector processor in one or more computer memory units implementing a buffer, the method comprising acts of:
- receiving, by the vector processor, one of a first vector and a second vector as input to the vector processor;
- providing, with the vector processor, the other one of the first vector and second vector as output of the vector processor, wherein the second vector is longer than the first vector;
- splitting, with the vector processor, the second vector into a plurality of stripes;
- and
- storing the second vector in the plurality of stripes in the buffer, wherein the buffer comprises a plurality of lines and storing comprises:
- aligning a first stripe of the plurality of stripes and a second stripe of the plurality of stripes by storing the first and second stripes on separate lines of the buffer.
Dependencies are inferred from the claim text.