Back to results
US 11,899,963 B2Granted
Suspension during a multi-plane write procedure
AssigneeMicron Technology, Inc.
InventorsCaixia Yang, Deping He
Life of this patent
Estimating the term…
Abstract
Methods, systems, and devices for suspension during a multi-plane write procedure are described. A memory system may perform a multi-plane write procedure by writing to a set of planes in parallel. Upon detecting a defective plane in the set of planes, the memory system may suspend writing to the defective plane until writing to the other planes in the set of planes is finished. The memory system may then resume writing to the defective plane.
Claims25
An apparatus, comprising:
- a memory device;
- and
- a controller coupled with the memory device and configured to cause the apparatus to:
- select a plurality of planes of the memory device for writing data;
- determine that a latency for writing a first subset of the data to a first plane of the plurality of planes is greater than a threshold latency;
- write, based at least in part on the latency being greater than the threshold latency, a remainder of the data to a remainder of the plurality of planes, the remainder excluding the first subset of the data and a second subset of the data for the first plane;
- and
- delay, based at least in part on the latency being greater than the threshold latency, writing the second subset of the data to the first plane until the remainder of the data is written to the remainder of the plurality of planes.
5 more elements
An apparatus, comprising:
- a controller configured to couple with a memory system, wherein the controller is configured to cause the apparatus to:
- transmit data for writing to a memory device of the memory system, the data associated with a plurality of planes of the memory device;
- receive an indication that a first plane of the plurality of planes has a latency for writing a first subset of the data that is greater than a threshold latency;
- and
- transmit an indication that the memory device is to delay writing a second subset of the data to the first plane until a remainder of the data is written to a remainder of the plurality of planes, wherein the remainder of the data excludes the first and second subsets of the data, and wherein the remainder of the plurality of planes excludes the first plane.
2 more elements
A method, comprising:
- selecting a plurality of planes of a memory device for writing data;
- determining that a latency for writing a first subset of the data to a first plane of the plurality of planes is greater than a threshold latency;
- writing, based at least in part on the latency being greater than the threshold latency, a remainder of the data to a remainder of the plurality of planes, the remainder excluding the first subset of the data and a second subset of the data for the first plane;
- and
- delaying, based at least in part on the latency being greater than the threshold latency, writing the second subset of the data to the first plane until the remainder of the data is written to the remainder of the plurality of planes.
2 more elements
Dependencies are inferred from the claim text.