Redundant computing across planes

An apparatus, comprising:

• a memory die comprising a plurality of planes arranged in a plurality of tiles, of the plurality of planes comprising content-addressable memory cells;
• and
• logic coupled with the memory die and configured to:
• perform a computational operation on first data that is stored in a first plane, wherein the computational operation is based at least in part on a capability of the content-addressable memory cells, and wherein the first data is representative of a first set of contiguous bits of a vector;
• perform, based at least in part on a first value for an output bit from the computational operation on the first data, the computational operation on second data that is stored in a second plane, wherein the second data is representative of a second set of contiguous bits of the vector;
• and
• perform, based at least in part on a second value for the output bit from the computational operation on the first data, the computational operation on third data that is stored in a third plane, wherein the third data is representative of the second set of contiguous bits of the vector.

A method, comprising:

• performing a computational operation on first data that is stored in a first plane of a plurality of planes comprising content-addressable memory cells, wherein the computational operation is based at least in part on a capability of the content-addressable memory cells, and wherein the first data is representative of a set of contiguous bits of a vector;
• performing, concurrent with performing the computational operation on the first data, the computational operation on second data that is stored in a second plane, wherein the second data is representative of the set of contiguous bits of the vector;
• and
• reading from the first plane and writing to the second plane, third data representative of a result of the computational operation on the first data.

A method, comprising:

• performing a computational operation on first data that is stored in a first plane of a plurality of planes comprising content-addressable memory cells, wherein the computational operation is based at least in part on a capability of the content-addressable memory cells, and wherein the first data is representative of a first set of contiguous bits of a vector;
• performing, based at least in part on a first value for an output bit from the computational operation on the first data, the computational operation on second data that is stored in a second plane, wherein the second data is representative of a second set of contiguous bits of the vector;
• and
• performing, based at least in part on a second value for the output bit from the computational operation on the first data, the computational operation on third data that is stored in a third plane, wherein the third data is representative of the second set of contiguous bits of the vector.

A method, comprising:

• performing a computational operation on first data that is stored in a first plane of a plurality of planes comprising content-addressable memory cells, wherein the computational operation is based at least in part on a capability of the content-addressable memory cells, and wherein the first data is representative of a first set of contiguous bits of a vector;
• performing, concurrent with the computational operation on the first data, the computational operation on second data that is stored in a second plane and that represents a second set of contiguous bits that is more significant than the first set of contiguous bits, wherein the computational operation on the second data is based at least in part on a first value for an output bit from the computational operation on the first data;
• performing, concurrent with the computational operation on the first data, the computational operation on third data that is stored in a third plane and that represents the second set of contiguous bits of the vector, wherein the computational operation on the third data is based at least in part on a second value for the output bit from the computational operation on the first data;
• and
• reading from the second plane and writing to the first plane, fourth data representative of a result of the computational operation on the second data, wherein the fourth data is copied based at least in part on the output bit from the computational operation on the first data having the first value.