Performance control for a memory sub-system

A memory system, comprising:

• a plurality of memory components;
• and
• a controller, operatively coupled with the plurality of memory components, wherein the controller is operable to cause the memory system to:
• monitor a bandwidth of a backend of the memory system for writing data to a memory device;
• determine that the bandwidth of the backend satisfies one or more performance criteria that are based at least in part on performance between the memory system and a host system that is external to the memory system;
• and
• allocate a quantity of one or more slots of a buffer to a frontend of the memory system based at least in part on determining that the bandwidth of the backend satisfies the one or more performance criteria.

A non-transitory computer-readable storage medium comprising instructions that, when executed by a processing device, cause the processing device to:

• monitor a bandwidth of a backend of a memory sub-system for writing data to a memory device;
• determine that the bandwidth of the backend satisfies one or more performance criteria that are based at least in part on performance between the memory sub-system and a host system that is external to the memory sub-system;
• and
• allocate a quantity of one or more slots of a buffer to a frontend of the memory sub-system based at least in part on determining that the bandwidth of the backend satisfies the one or more performance criteria.