Memory system with activate-leveling method
AssigneeRambus Inc.
InventorsFrederick A. Ware, Craig E. Hampel
Life of this patent
Estimating the term…
Abstract
Improvements are disclosed for “leveling” or averaging out more evenly the number of activate/precharge cycles seen by the rows of a memory component, so that one or more particular rows are not excessively stressed (relative to the other rows). In one embodiment, a memory controller includes remapping facilities arranged to move data stored in a physical row from RPK to RPK′ and modify the mapping from logical row RLK while minimizing impact on normal read/write operations. Remapping operations may be scheduled relative to refresh or other maintenance operations. Remapping operations may be conditionally deferred so as to minimize performance impact.
Claims20
A memory controller comprising:
- a request queue configured to store memory access requests for a memory component, each memory access request pertaining to data having an associated logical address in the memory component;
- and
- a remapping block configured to:
- fetch a memory access request from the request queue responsive to a determination;
- determine the associated logical address corresponding to the memory access request;
- remap the associated logical address to a new physical address of the memory component;
- and
- process the memory access request according to whether a physical row of the memory component associated with the new physical address has been partially transferred to a new location.
A method for a memory controller comprising:
- fetching a memory access request from a request queue responsive to a determination, wherein the request queue is configured to store memory access requests for a memory component, each memory access request pertaining to data having an associated logical address in the memory component;
- determining the associated logical address corresponding to the memory access request;
- remapping, by a remapping block of the memory controller, the associated logical address to a new physical address of the memory component;
- and
- processing the memory access request according to whether a physical row of the memory component associated with the new physical address has been partially transferred to a new location.
A memory module comprising:
- a memory component;
- and
- a memory controller, the memory controller comprising:
- a request queue configured to store memory access requests for the memory component, each memory access request pertaining to data having an associated logical address in the memory component;
- and
- a remapping block configured to:
- fetch a memory access request from the request queue responsive to a determination;
- determine the associated logical address corresponding to the memory access request;
- remap the associated logical address to a new physical address of the memory component;
- and
- process the memory access request according to whether a physical row of the memory component associated with the new physical address has been partially transferred to a new location.
Dependencies are inferred from the claim text.