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US 11,899,532 B2Granted
Determining locations in NAND memory for boot-up code
AssigneeMicron Technology, Inc.
InventorsNitul Gohain, Giuseppe Cariello, Jameer Mulani
Life of this patent
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Abstract
Methods, systems, and devices for determining locations in memory for boot-up code are described. An indication of one or more timeout durations for a boot sequence is received. Information for the boot sequence is stored in one or more memory cells based on the one or more timeout durations, where the one or more memory cells is selected based on a read latency, an error rate, or a storage-level of the one or more memory cells with relation to the indicated one or more timeout durations. The information for the boot sequence stored in the one or more memory cells is accessed based on an initialization of the boot sequence.
Claims21
An apparatus, comprising:
- a memory device comprising a plurality of memory cells, and
- one or more controllers coupled with the memory device and configured to cause the apparatus to:
- receive an indication of a timeout duration for a boot sequence of a host system;
- determine a quantity of bits configured to be output by respective memory cells of a set of memory cells of the plurality of memory cells;
- select, based at least in part on the timeout duration, the set of memory cells based at least in part on the quantity of bits being less than a data level threshold;
- store information for the boot sequence in the set of memory cells based at least in part on selecting the set of memory cells;
- and
- access the information for the boot sequence that is stored in the set of memory cells based at least in part on an initialization of the boot sequence.
5 more elements
An apparatus, comprising:
- a memory device comprising a plurality of memory cells, and
- one or more controllers coupled with the memory device and configured to cause the apparatus to:
- receive an indication of a timeout duration for a boot sequence of a host system;
- determine a read latency for respective memory cells of a set of memory cells of the plurality of memory cells;
- select, based at least in part on the timeout duration, the set of memory cells based at least in part on the read latency being less than a latency threshold;
- store information for the boot sequence in the set of memory cells based at least in part on selecting the set of memory cells;
- and
- access the information for the boot sequence that is stored in the set of memory cells based at least in part on an initialization of the boot sequence.
5 more elements
An apparatus, comprising:
- a memory device comprising a plurality of memory cells, and
- one or more controllers coupled with the memory device and configured to cause the apparatus to:
- receive an indication of a timeout duration for a boot sequence of a host system;
- store information for the boot sequence in a set of memory cells of the plurality of memory cells based at least in part on the timeout duration;
- and
- access the information for the boot sequence that is stored in the set of memory cells based at least in part on an initialization of the boot sequence, wherein:
- the timeout duration is for a first portion of the boot sequence,
- the indication further comprises a second indication of a second timeout duration for a second portion of the boot sequence, and
- the information stored in the set of memory cells is for the first portion of the boot sequence that precedes the second portion of the boot sequence.
6 more elements
An apparatus, comprising:
- a memory device comprising a plurality of memory cells, and
- one or more controllers coupled with the memory device and configured to cause the apparatus to:
- receive an indication of a timeout duration for a boot sequence of a host system;
- store information for the boot sequence in a set of memory cells of the plurality of memory cells based at least in part on the timeout duration;
- access the information for the boot sequence that is stored in the set of memory cells based at least in part on an initialization of the boot sequence;
- receive, subsequent to accessing the information for the boot sequence, a second indication of a second timeout duration for the boot sequence of the host system;
- store the information for the boot sequence in a second set of memory cells of the plurality of memory cells based at least in part on the second timeout duration;
- and
- access, after storing the information for the boot sequence in the second set of memory cells, the information stored in the second set of memory cells based at least in part on a subsequent initialization of the boot sequence.
6 more elements
An apparatus, comprising:
- one or more controllers configured to couple with a memory system, wherein the one or more controllers is configured to cause the apparatus to:
- set a first timeout duration for a boot sequence of a host system;
- set a second timeout duration for the boot sequence of the host system based at least in part on an increase in an operating age of a memory device above an age threshold, an increase in an average error rate of the memory device above an error threshold, an increase in a temperature of the memory device above a temperature threshold, modifying a power setting for the memory device, or any combination thereof;
- transmit, to the memory device, an indication of the first timeout duration for the boot sequence;
- and
- initialize the boot sequence to access a set of memory cells of the memory device that store information for the boot sequence based at least in part on the first timeout duration.
3 more elements
A non-transitory, computer-readable medium storing code comprising instructions which, when executed by one or more processors of an electronic device, cause the electronic device to:
- receive an indication of a timeout duration for a boot sequence of a host system;
- store information for the boot sequence in a set of memory cells of a memory device based at least in part on the timeout duration;
- access the information for the boot sequence that is stored in the set of memory cells based at least in part on an initialization of the boot sequence;
- perform a procedure for building a table associated with accessing the memory device based at least in part on the initialization of the boot sequence;
- and
- store one or more checkpoints associated with building the table during the initialization of the boot sequence.
3 more elements
A non-transitory, computer-readable medium storing code comprising instructions which, when executed by one or more processors of an electronic device, cause the electronic device to:
- receive an indication of a timeout duration for a boot sequence of a host system;
- determine an expected error rate for a set of memory cells of a plurality of memory cells based at least in part on a measured error rate for the set of memory cells, properties of a set of access lines corresponding to the set of memory cells, a sensing window of the set of memory cells, or any combination thereof;
- select, based at least in part on the timeout duration, the set of memory cells based at least in part on the expected error rate of the set of memory cells being less than an error threshold;
- store information for the boot sequence in the set of memory cells based at least in part on selecting the set of memory cells;
- and
- access the information for the boot sequence that is stored in the set of memory cells based at least in part on an initialization of the boot sequence.
3 more elements
Dependencies are inferred from the claim text.