Synchronizing power state changes between multiple dies

A method for synchronizing power states between a plurality of integrated circuit dies coupled together, the method comprising:

• determining, by a first integrated circuit die of the plurality of integrated circuit dies, to synchronize a power state change of the plurality of integrated circuit dies from a first power state to a second power state, wherein the first and second integrated circuit dies include respective processor circuitry configured to retrieve program instructions from random access memory and execute the program instructions to implement software routines;
• issuing, by the first integrated circuit die and to the second integrated circuit die, a request to transition from the first power state to the second power state;
• receiving, by the first integrated circuit die and from the second integrated circuit die, an acknowledgement that the second integrated circuit die has transitioned to the second power state;
• and
• transitioning, by the first integrated circuit die, the first integrated circuit die from the first power state to the second power state.

A system, comprising:

• a plurality of integrated circuit dies coupled together, wherein the integrated circuit dies include a first and a second system-on-a-chip (SOC) that respectively include at least a central processing unit (CPU) and a graphics processing unit (GPU);
• wherein the first SOC is configured to synchronize a power state change of the first and second SOCs from a first power state to a second power state, and wherein to synchronize the power state change, the first SOC is configured to:
• issue a transition request to the second SOC to transition from the first power state to the second power state;
• wherein the second SOC is configured to:
• receive the transition request from the first SOC;
• transition the second SOC to the second power state;
• and
• issue an acknowledgement to the first SOC that the second SOC has transitioned to the second power state;
• and
• wherein the first SOC is configured to:
• transition the first SOC from the first power state to the second power state.