Voltage monitoring circuit for interface
AssigneeApple Inc.
InventorsFabien S. Faure, Si Chen, Mansour Keramat, Arnaud J. Forestier
Life of this patent
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Abstract
A voltage monitoring circuit is disclosed. An apparatus includes a first physical interface circuit and a real-time oscilloscope circuit configured to monitor a first voltage provided to the first physical interface circuit. The real-time oscilloscope is configured to receive an indication that an error was detected in data transmitted from the first physical interface to a second physical interface circuit. The real-time oscilloscope is further configured to provide for debug, to a host computer external to the first interface, information indicating a state of the first voltage at a time at which the error was detected.
Claims20
An apparatus comprising:
- a first physical interface circuit;
- and
- a real-time oscilloscope circuit configured to monitor a first voltage provided to the first physical interface circuit, wherein the real-time oscilloscope circuit is configured to:
- receive an indication that an error was detected in data transmitted from the first physical interface circuit to a second physical interface circuit;
- and
- provide for debug, to a host computer external to the first physical interface circuit, information indicating a state of the first voltage at a time at which the error was detected.
A method comprising:
- conveying a plurality of data bits from a first physical interface circuit to a second physical interface circuit;
- monitoring, in a debug mode and using an event capture circuit, a first voltage provided to the first physical interface circuit;
- receiving, from the second physical interface circuit, an indication that an error was detected in the plurality of data bits;
- and
- providing for debug, to a host computer external to the first interface, information indicating a state of the first voltage at a time at which the error was detected.
A system comprising:
- a first physical interface circuit coupled to receive a supply voltage, wherein the first physical interface circuit includes transmitter circuitry configured to transmit a plurality of data bits;
- a second physical interface circuit configured to receive the plurality of data bits transmitted by the transmitter circuitry, wherein the second physical interface circuit includes error detection circuitry configured to assert an indication in response to detecting an error in the plurality of data bits;
- and
- an event capture circuit configured to, in a debug mode, monitor the supply voltage provided to the transmitter circuitry, and further configured to provide for debug, in response to the error detection circuit generating the indication, information indicative of a state of the supply voltage at a time the error was detected to a host computer system external to the first interface circuit.
Dependencies are inferred from the claim text.