# US 11,898,249 B2 · PECVD process

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- Number: US 11,898,249 B2
- Document ID: US11898249B2
- Status: Granted
- Kind: B2
- Application number: 18/108,989
- Filed: 2023-02-13
- Published: 2023-06-22
- Granted: 2024-02-13
- Earliest claimed: 2012-10-26
- Assignees: Applied Materials, Inc.
- Applicants: Applied Materials, Inc.
- Inventors: Nagarajan Rajagopalan; Xinhai Han; Michael Wenyoung Tsiang; Masaki Ogata; Zhijun Jiang; Juan Carlos Rocha-Alvarez; Thomas Nowak; Jianhua Zhou; Ramprakash Sankarakrishnan; Amit Kumar Bansal; Jeongmin Lee; Todd Egan; Edward W. Budiarto; Dmitriy Panasyuk; Terrance Y. Lee; Jian J. Chen; Mohamad A. Ayoub; Heung Lak Park; Patrick Reilly; Shahid Shaikh; Bok Hoen Kim; Sergey Starik; Ganesh Balasubramanian
- Web page: https://patentgrep.com/patent/US11898249B2

## CPC

- C23C 16/52: Controlling or regulating the coating process {(C23C16/45557, C23C16/279 take precedence)}
- C23C 16/45565: {Shower nozzles}
- C23C 16/4557: {Heated nozzles}
- C23C 16/458: characterised by the method used for supporting substrates in the reaction chamber
- C23C 16/46: characterised by the method used for heating the substrate (C23C16/48, C23C16/50 take precedence)
- C23C 16/50: using electric discharges {(generation and control of plasma in discharge tubes for surface treatment H01J37/32, H01J37/34)}
- C23C 16/505: using radio frequency discharges
- C23C 16/509: using internal electrodes
- C23C 16/5096: {Flat-bed apparatus}
- G01B 11/0625: {with measurement of absorption or reflection}
- G01B 11/0683: {measurement during deposition or removal of the layer}
- G01N 21/55: Specular reflectivity
- G01N 21/658: {enhancement Raman, e.g. surface plasmons}
- H10P 72/0602: {Temperature monitoring}
- H10P 72/0604: {Process monitoring, e.g. flow or thickness monitoring}
- H10P 72/76: using mechanical means, e.g. clamps or pinches
- H10P 95/00: Generic processes or apparatus for manufacture or treatments not covered by the other groups of this subclass
- G01N 2201/1222: Endpoint determination; reaction time determination
- C23C: COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL (making metal-coated products by extrusion B21C23/22; covering with metal by connecting pre-existing layers to articles, see the relevant places, e.g. B21D39/00, B23K; metallising of glass C03C; metallising mortars, concrete, artificial stone, ceramics or natural stone C04B41/00; enamelling of, or applying a vitreous layer to, metals C23D; treating metal surfaces or coating of metals by electrolysis or electrophoresis C25D; single-crystal film growth C30B; by metallising textiles D06M11/83; decorating textiles by locally metallising D06Q1/04)
- G01B: MEASURING LENGTH, THICKNESS OR SIMILAR LINEAR DIMENSIONS; MEASURING ANGLES; MEASURING AREAS; MEASURING IRREGULARITIES OF SURFACES OR CONTOURS
- G01N: INVESTIGATING OR ANALYSING MATERIALS BY DETERMINING THEIR CHEMICAL OR PHYSICAL PROPERTIES (measuring or testing apparatus or processes other than immunoassay, involving enzymes or microorganisms C12M, C12Q)
- H10P: GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10

## Abstract

A method of processing a substrate according to a PECVD process is described. Temperature profile of the substrate is adjusted to change deposition rate profile across the substrate. Plasma density profile is adjusted to change deposition rate profile across the substrate. Chamber surfaces exposed to the plasma are heated to improve plasma density uniformity and reduce formation of low quality deposits on chamber surfaces. In situ metrology may be used to monitor progress of a deposition process and trigger control actions involving substrate temperature profile, plasma density profile, pressure, temperature, and flow of reactants.

## Claims

### Claim 1

A semiconductor processing device, comprising:
a chamber having an internal volume defined by a side wall, a floor, and a lid;
a gas distributor having a plurality of gas flow openings formed therethrough; and
a substrate support disposed in the internal volume of the chamber, the substrate support comprising:
a first heating element disposed in the substrate support;
a second heating element disposed in the substrate support beneath the first heating element and extending radially outward beyond the first heating element; and
a thermocouple disposed in the substrate support beneath the second heating element.

### Claim 2 (depends on 1)

The semiconductor processing device of claim 1, the thermocouple further comprising:
a junction;
a longitudinal piece of a first material, the first material comprising a conductive material;
a longitudinal piece of a second material, the second material comprising a conductive material; and
an insulating material, the insulating material being disposed between the first material and the second material.

### Claim 3 (depends on 2)

The semiconductor processing device of claim 2, wherein the substrate support further comprising:
a lower surface, the lower surface comprising:
a first hole to expose the longitudinal piece of the first material; and
a second hole to expose the longitudinal piece of the second material.

### Claim 4 (depends on 1)

The semiconductor processing device of claim 1, the substrate support further comprising a plurality of electrodes, wherein:
the plurality of electrodes comprises a bias electrode and a tuning electrode;
a first one of the plurality of electrodes is positioned above the first heating element; and
a different one of the plurality of electrodes is positioned above the first one of the plurality of electrodes.

### Claim 5 (depends on 1)

The semiconductor processing device of claim 1, the substrate support further comprising a plurality of electrodes, wherein:
the plurality of electrodes comprises a bias electrode and a tuning electrode;
a first one of the plurality of electrodes is positioned below the thermocouple; and
a different one of the plurality of electrodes is positioned below the first one of the plurality of electrodes.

### Claim 6 (depends on 1)

The semiconductor processing device of claim 1, wherein the substrate support further comprising:
a lower surface, the lower surface comprising a hole; and
a second thermocouple, the second thermocouple being disposed in the hole.

### Claim 7 (depends on 6)

The semiconductor processing device of claim 6, wherein the semiconductor processing device further comprises a controller, the controller comprising a processor and circuitry adapted to receive and record a signal from the thermocouple and the second thermocouple and apply a current to the first heating element and the second heating element.

### Claim 8

A semiconductor processing device, comprising:
a first chamber having an internal volume defined by a side wall, a floor, and a lid;
a first gas distributor having a plurality of gas flow openings formed therethrough; and
a first substrate support disposed in the internal volume of the chamber, the first substrate support comprising:
a first heating element disposed in the first substrate support;
a second heating element disposed in the first substrate support beneath the first heating element and extending radially outward beyond the first heating element; and
a first thermocouple disposed in the first substrate support beneath the second heating element; and
a second chamber having an internal volume defined by a side wall, a floor, and a lid;
a second gas distributor having a plurality of gas flow openings formed therethrough; and
a second substrate support disposed in the internal volume of the chamber, the second substrate support comprising:
a third heating element disposed in the second substrate support;
a fourth heating element disposed in the second substrate support beneath the third heating element and extending radially outward beyond the third heating element; and
a second thermocouple disposed in the second substrate support beneath the fourth heating element.

### Claim 9 (depends on 8)

The semiconductor processing device of claim 8, wherein:
the first thermocouple further comprises:
a junction;
a longitudinal piece of a first material, the first material comprising a conductive material;
a longitudinal piece of a second material, the second material comprising a conductive material; and
an insulating material, the insulating material being disposed between the longitudinal piece of first material and the longitudinal piece of second material; and
the second thermocouple further comprises:
a junction;
a longitudinal piece of a first material, the first material comprising a conductive material;
a longitudinal piece of a second material, the second material comprising a conductive material; and
an insulating material, the insulating material being disposed between the longitudinal piece of first material and the longitudinal piece of second material.

### Claim 10 (depends on 9)

The semiconductor processing device of claim 9, wherein:
the first substrate support of the first chamber further comprises:
a lower surface, the lower surface comprising:
a first hole to expose the longitudinal piece of first material; and
a second hole to expose the longitudinal piece of second material; and
the second substrate support of the second chamber further comprises:
a lower surface, the lower surface comprising:
a first hole to expose the longitudinal piece of first material; and
a second hole to expose the longitudinal piece of second material.

### Claim 11 (depends on 8)

The semiconductor processing device of claim 8, wherein:
the first substrate support of the first chamber further comprises a first plurality of electrodes, wherein:
the first plurality of electrodes comprises a bias electrode and a tuning electrode;
a first one of the first plurality of electrodes is positioned above the first heating element; and
a different one of the first plurality of electrodes is positioned above the first one of the first plurality of electrodes; and
the second substrate support of the second chamber further comprises a second plurality of electrodes, wherein:
the second plurality of electrodes comprises a bias electrode and a tuning electrode;
a first one of the second plurality of electrodes is positioned above the third heating element; and
a different one of the second plurality of electrodes is positioned above the first one of the second plurality of electrodes.

### Claim 12 (depends on 8)

The semiconductor processing device of claim 8, wherein:
the first substrate support of the first chamber further comprises a first plurality of electrodes, wherein:
the first plurality of electrodes comprises a bias electrode and a tuning electrode;
a first one of the first plurality of electrodes is positioned below the first thermocouple; and
a different one of the first plurality of electrodes is positioned below the first one of the first plurality of electrodes; and
the second substrate support of the second chamber further comprises a second plurality of electrodes, wherein:
the second plurality of electrodes comprises a bias electrode and a tuning electrode;
a first one of the second plurality of electrodes is positioned below the second thermocouple; and
a different one of the second plurality of electrodes is positioned below the first one of the second plurality of electrodes.

### Claim 13 (depends on 8)

The semiconductor processing device of claim 8, wherein:
the first substrate support for the first chamber further comprises:
a lower surface, the lower surface comprising a hole; and
a third thermocouple, the third thermocouple being disposed in the hole; and
the second substrate support for the second chamber further comprises:
a lower surface, the lower surface comprising a hole; and
a fourth thermocouple, the fourth thermocouple being disposed in the hole.

### Claim 14 (depends on 13)

The semiconductor processing device of claim 13, wherein the semiconductor processing device further comprises a controller, the controller comprising a processor and circuitry adapted to:
receive and record a signal from at least one of:
the first thermocouple;
the second thermocouple;
the third thermocouple; and
the fourth thermocouple; and
apply a current to at least one of:
the first heating element;
the second heating element;
the third heating element; and
the fourth heating element.

### Claim 15

A semiconductor processing device, comprising:
a chamber having an internal volume defined by a side wall, a floor, and a lid;
a gas distributor having a plurality of gas flow openings formed therethrough, the gas flow openings being more densely distributed at a center of the gas distributor and less densely distributed at an edge of the gas distributor;
a substrate support disposed in the internal volume of the chamber; and
an electrode coupled to the substrate support, the electrode coupled to a tuning circuit, wherein the tuning circuit comprises a variable capacitor.

### Claim 16 (depends on 15)

The semiconductor processing device of claim 15, further comprising a second chamber having an internal volume defined by a side wall, a floor, and a lid;
a second gas distributor having a plurality of gas flow openings formed therethrough, the gas flow openings being more densely distributed at a center of the second gas distributor and less densely distributed at an edge of the second gas distributor;
a second substrate support disposed in the internal volume of the chamber; and
a second electrode coupled to the substrate support, the second electrode coupled to a second tuning circuit, wherein the second tuning circuit comprises a variable capacitor.

### Claim 17 (depends on 15)

The semiconductor processing device of claim 15, wherein one or more of the gas flow openings of the gas distributor includes in situ metrology devices.