Crypto processor, method of operating crypto processor, and electronic device including crypto processor

A method of operating a crypto processor, the method comprising:

• controlling an operation mode of the crypto processor;
• encrypting input data to plural lattice-based texts;
• and
• generating a lattice-based text result for a homomorphic operation, selected among plural homomorphic operations based on the controlled operation mode, by operating plural multipliers in parallel with respect to coefficients of polynomials of the plural lattice-based texts and based on the controlled operation mode, including operating at least one first multiplier, of the plural multipliers, provided a first portion of the coefficients, operating at least one second multiplier, of the plural multipliers, provided a second portion of the coefficients, and selectively operating an adder provided some results of the operated plural multipliers dependent on the controlled operation mode,
• wherein the adder is operated in response to the controlled operation mode being a first mode,
• wherein a same coefficient is provided to each of the plural multipliers, for the operating the plural multipliers, in response to the controlled operation mode being a second mode, and
• wherein different coefficients are provided to the plural multipliers, for the operating the plural multipliers, in response to the operation mode being a third mode.

A crypto processor, the crypto processor comprising:

• an encryptor configured to encrypt input data to plural lattice-based texts;
• a multiplexer configured to multiplex coefficients of polynomials of the plural lattice-based texts, to selectively provide the multiplexed coefficients to plural multipliers,
• input registers configured to respectively store the selectively provided multiplexed coefficients;
• the plural multipliers;
• an adder;
• and
• output registers configured to store a lattice-based text result for a homomorphic operation with respect to the multiplexed coefficients that is based on results of configured respective parallel operating of the plural multipliers and a result of the adder,
• wherein the operating of the plural multipliers includes an operating of a first multiplier, of the plural multipliers, provided a first portion of the multiplexed coefficients, an operating of a second multiplier, of the plural multipliers, provided a second portion of the multiplexed coefficients, and a selective operating of the adder provided some results of the operated plural multipliers.

An electronic device, comprising:

• an encryptor configured to encrypt input data to plural lattice-based texts;
• a memory configured to store coefficients of polynomials of the plural lattice-based texts for a polynomial multiplication;
• and
• a crypto processor configured to:
• multiplex the coefficients and transmit the multiplexed coefficients to plural multipliers;
• and
• generate a lattice-based text result for a homomorphic operation by operating the plural multipliers in parallel with respect to the multiplexed coefficients, including operating at least one first multiplier, of the plural multipliers, provided a first portion of the multiplexed coefficients, operating at least one second multiplier, of the plural multipliers, provided a second portion of the multiplexed coefficients, and operating an adder provided some results of the operated plural multipliers.

An electronic device, comprising:

• one or more processors configured to:
• encrypt a first plaintext to a first ciphertext, which is expressed by a first polynomial including a first message and a second polynomial including a first encrypt key;
• encrypt a second plaintext to a second ciphertext, which is expressed by a third polynomial including a second message and a fourth polynomial including a second encrypt key;
• control respective generations, in parallel, of plural multiplication results based on multiplexed of coefficients of the first polynomial, the second polynomial, the third polynomial, and the fourth polynomial;
• and
• generate a lattice-based text result for a polynomial multiplication of the first ciphertext and the second ciphertext based on the generated plural multiplication results, including a first multiplication result generated based on a first portion of the multiplexed coefficients, a second multiplication result generated based on a second portion of the multiplexed coefficients, and selectively a summation result generated based on some of the generated plural multiplication results.

A method of operating a crypto processor, the method comprising:

• encrypting input data to plural lattice-based texts;
• selectively providing, to different multipliers of plural multipliers, coefficients of polynomials of the respective lattice-based texts for one homomorphic operation selected, based on a set operation mode, from among plural different homomorphic operations;
• and
• generate a lattice-based result of the selected homomorphic operation by operating the plural multipliers in parallel with respect to the selectively provided coefficients, including operating at least one first multiplier, of the plural multipliers, provided a first portion of the selectively provided coefficients, operating at least one second multiplier, of the plural multipliers, provided a second portion of the selectively provided coefficients, and selectively operating an adder provided some results of the operated plural multipliers.