Forming a sacrificial liner for dual channel devices
AssigneeAdeia Semiconductor Solutions LLC
InventorsHuiming Bu, Kangguo Cheng, Dechao Guo, Sivananda K. Kanakasabapathy, Peng Xu
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AssigneeAdeia Semiconductor Solutions LLC
InventorsHuiming Bu, Kangguo Cheng, Dechao Guo, Sivananda K. Kanakasabapathy, Peng Xu
Estimating the term…
A semiconductor device includes one or more fins. Each fin includes a top channel portion formed from a channel material, a middle portion, and a bottom substrate portion formed from a same material as an underlying substrate. An oxide layer is formed between the bottom substrate portion of each fin and the isolation layer, with a space between a sidewall of at least a top portion of the isolation dielectric layer and an adjacent sidewall of the one or more fins, above the oxide layer. A gate dielectric, protruding into the space and in contact with the middle portion, is formed over the one or more fins and has a portion formed from a material different from the oxide layer.
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Dependencies are inferred from the claim text.