Gate-all-around monolithic stacked field effect transistors having multiple threshold voltages

A CFET (complementary field effect transistor) structure comprising:

• a substrate;
• a first CFET formed above the substrate;
• a second CFET formed above the substrate;
• a third CFET formed above the substrate;
• and
• a fourth CFET formed above the substrate;
• wherein:
• the first CFET comprises a top FET and a bottom FET, each of the top FET and bottom FET comprising at least one nanosheet channel;
• a gate affiliated with the first CFET and the second CFET devices comprising a continuous horizontal dielectric over the entire length of the gate;
• the top FET of each stacked FET comprises a first polarity;
• the bottom FET of each stacked FET comprises a second polarity;
• the top FET of the first CFET comprises a first work function metal;
• the top FET of the second CFET comprises a second work function metal;
• the top FET of the third CFET comprises a third work function metal;
• and
• the top FET of the fourth CFET comprises a fourth work function metal.