Back side contact structure for a semiconductor device and corresponding manufacturing process

A process for manufacturing a vertical-conduction semiconductor device, the process comprising:

• providing a silicon substrate having a front face and a rear face;
• forming a front-side structure on the front face of the silicon substrate, the front-side structure having at least one current-conduction region at a respective front face;
• and
• forming a back side metal structure on the rear face of the silicon substrate and in electrical contact with the silicon substrate, the back side metal structure including an overlapped stack of metal layers,
• the forming of the back side metal structure including:
• forming a first metal layer and a silicide region, the silicide region being between the rear face of the silicon substrate and the first metal layer, the silicide region being in electrical contact with the rear face of the silicon substrate, the forming of the first metal layer being carried out by PVD (Physical Vapour Deposition), which is controlled to reach a temperature that triggers formation, during the PVD, of the silicide region;
• and
• forming a second metal layer on the first metal layer.

A method, comprising:

• forming a first structure on a first side of a substrate, the first structure including at least one current-conduction region;
• and
• forming a second structure on a second side, opposite the first side, of the substrate, the second structure being electrically coupled to the substrate, the forming of the second structure including:
• forming a first conductive layer and a silicide region on the second side of the substrate, the silicide region being between the second side of the substrate and the first conductive layer, the silicide region being electrical coupled to the substrate, the forming of the first conductive layer being performed at a temperature that triggers the forming of the silicide region;
• and
• forming a second conductive layer on the first conductive layer.