Semiconductor structure, preparation method of same, and semiconductor device
AssigneeChangxin Memory Technologies, Inc.
InventorXianlei Cao
Life of this patent
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Abstract
A semiconductor structure, a preparation method of the same, and a semiconductor device are provided. The semiconductor structure includes a substrate, including an active area. A first electrode layer is arranged on the substrate and electrically connected to the active area. The first electrode layer extends in a direction perpendicular to the substrate. A dielectric layer is arranged on a surface of the first electrode layer. A second electrode layer is arranged on a surface of the dielectric layer. Each of the surface of the first electrode layer and the surface of the dielectric layer are provided with an uneven structure.
Claims19
A semiconductor structure, comprising:
- a substrate, comprising an active area;
- a first electrode layer, arranged on the substrate and electrically connected to the active area, the first electrode layer extending in a direction perpendicular to the substrate;
- a dielectric layer, arranged on a surface of the first electrode layer;
- and
- a second electrode layer, arranged on a surface of the dielectric layer,
- wherein each of the surface of the first electrode layer and the surface of the dielectric layer is provided an uneven structure,
- wherein a projection of the first electrode layer on the substrate is a first ring, and a projection of the dielectric layer on the substrate comprises a second ring and a third ring, the second ring being nested inside the first ring, and the third ring being sleeved outside the first ring;
- and
- wherein a projection of the second electrode layer on the substrate comprises a solid portion and a fourth ring, the solid portion being located inside the second ring, and the fourth ring being sleeved outside the third ring.
A semiconductor device, comprising a substrate, transistors, word lines, bit lines, and semiconductor structures, each of the semiconductor structures comprising:
- the substrate, comprising an active area;
- a first electrode layer, arranged on the substrate and electrically connected to the active area, the first electrode layer extending in a direction perpendicular to the substrate;
- a dielectric layer, arranged on a surface of the first electrode layer;
- and
- a second electrode layer, arranged on a surface of the dielectric layer,
- wherein each of the surface of the first electrode layer and the surface of the dielectric layer is provided an uneven structure,
- wherein the bit lines are arranged on the substrate, the word lines are arranged on the bit lines in a staggered manner, a gate of each of the transistors is connected with one of the word lines, a source and a drain of each of the transistors are formed in the active area of the substrate, the drain of each of the transistors is connected with one of the bit lines, and the source of each of the transistors is connected with the first electrode layer of one of the semiconductor structures.
A preparation method of a semiconductor structure, comprising:
- providing a substrate having an active area;
- forming a sacrificial layer having a hollow cavity and located on the substrate, an inner sidewall surface of the hollow cavity having an uneven structure;
- forming a first electrode layer located on the inner sidewall surface of the hollow cavity, a surface of the first electrode layer having an uneven structure, the first electrode layer being electrically connected to the active area, and the first electrode layer extending in a direction perpendicular to the substrate;
- removing the sacrificial layer;
- forming a dielectric layer located on the surface of the first electrode layer, a surface of the dielectric layer having an uneven structure;
- and
- forming a second electrode layer located on the surface of the dielectric layer,
- wherein a projection of the first electrode layer on the substrate is a first ring, and a projection of the dielectric layer on the substrate comprises a second ring and a third ring, the second ring being nested inside the first ring, and the third ring being sleeved outside the first ring;
- and
- wherein a projection of the second electrode layer on the substrate comprises a solid portion and a fourth ring, the solid portion being located inside the second ring, and the fourth ring being sleeved outside the third ring.
Dependencies are inferred from the claim text.