Set of integrated standard cells
AssigneesSTMicroelectronics France, STMicroelectronics (Crolles 2) SAS
InventorsOlivier Weber, Christophe Lecocq
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Abstract
An integrated circuit includes at least a first standard cell framed by two second standard cells. The three cells are disposed adjacent to each other, and each standard cell includes at least one NMOS transistor and at least one least one PMOS transistor located in and on a silicon-on-insulator substrate. The at least one PMOS transistor of the first standard cell has a channel including silicon and germanium. The at least one PMOS transistor of each second standard cell has a silicon channel and a threshold voltage different in absolute value from the threshold voltage of said at least one PMOS transistor of the first cell.
Claims12
An integrated circuit, comprising:
- a silicon-on-insulator substrate;
- at least a first standard cell framed by two second standard cells, the three cells being disposed adjacent to each other, each cell including:
- at least two NMOS transistors and at least two PMOS transistors located in and on the silicon-on-insulator substrate, the at least two PMOS transistors of the first standard cell having a channel including silicon and germanium, the at least two NMOS transistors of each second standard cell having a silicon channel and a threshold voltage different in absolute value from a threshold voltage of the at least two PMOS transistors of the first standard cell.
Dependencies are inferred from the claim text.