Structures and methods for trench isolation

A semiconductor structure, comprising:

• a substrate that includes:
• a handle layer,
• an insulation layer comprising silicon dioxide and arranged over the handle layer,
• a buried layer arranged over the insulation layer, and
• a plurality of trenches each of which extends downward from an upper surface of the buried layer and terminates in the handle layer,
• wherein the buried layer is divided into a plurality of functional areas by the plurality of trenches;
• a dielectric layer located on a bottom surface of each of the plurality of trenches and contacting the handle layer, wherein the dielectric layer comprises a first sub-layer and a second sub-layer;
• a polysilicon region located in each of the plurality of trenches, wherein a first bottom surface and a first side surface of the polysilicon region contact the second sub-layer, wherein a second bottom surface and a second side surface of the second sub-layer contact the first sub-layer, and wherein a first top surface of the polysilicon region is lower than a second top surface of the first sub-layer and a third top surface of the second sub-layer;
• and
• a plurality of transistors that are formed in the plurality of functional areas of the buried layer respectively and electrically connected through metal lines over the plurality of transistors during a charging process.

A semiconductor device, comprising:

• a substrate that includes:
• a handle layer,
• an insulation layer comprising silicon dioxide and arranged over the handle layer,
• a buried layer arranged over the insulation layer, and
• a trench extending downward from an upper surface of the buried layer and terminating in the handle layer;
• a dielectric layer comprising a bottom portion that extends along and is located on a bottom surface of the trench and contacting the handle layer, wherein
• the dielectric layer comprises:
• a first sub-layer of lining oxide, and a second sub-layer of pad oxide that is formed on the first sub-layer and is thicker than the first sub-layer,
• the first sub-layer of lining oxide has a thickness between about 150 angstroms and about 300 angstroms, and
• the second sub-layer of pad oxide has a thickness between about 350 angstroms and about 1000 angstroms;
• and
• a polysilicon region filling the trench, wherein a first bottom surface and a first side surface of the polysilicon region contact the second sub-layer, wherein a second bottom surface and a second side surface of the second sub-layer contact the first sub-layer, and wherein a first top surface of the polysilicon region is lower than a second top surface of the first sub-layer and a third top surface of the second sub-layer.