Power enhanced stacked chip scale package solution with integrated die attach film
AssigneeIntel Corporation
InventorsZhijun Xu, Bin Liu, Yong She, Zhicheng Ding
Life of this patent
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Abstract
An apparatus comprising: a die stack comprising at least one die pair, the at least one die pair having a first die over a second die, the first die and the second die both having a first surface and a second surface, the second surface of the first die over the first surface of the second die; and an adhesive film between the first die and the second die of the at least one die pair; wherein the adhesive film comprises an insulating layer and a conductive layer, the insulating layer adhering to the second surface of the first die and the conductive layer adhering to the first surface of the second die.
Claims19
An apparatus, comprising:
- an integrated circuit (IC) die stack comprising at least a first die under a second die;
- and
- a film between the first die and the second die, wherein the film comprises an electrically conductive layer over a first surface of the first die and an electrically insulative layer over a second surface of the second die.
An apparatus, comprising:
- a first die and a second die, one over the other, and wherein the first die comprises a first contact pad and a second contact pad;
- and
- a film between the first die and the second die, wherein:
- a first thickness of the film electrically couples the first contact pad to the second contact pad;
- and
- a second thickness of the film electrically insulates the second die from the first thickness of the film.
Dependencies are inferred from the claim text.