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US 11,894,332 B2Granted
Substrate and package structure
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsWei-Hung Lin, Hsiu-Jen Lin, Ming-Da Cheng, Yu-Min Liang, Chen-Shien Chen, Chung-Shi Liu
Life of this patent
Estimating the term…
Abstract
According to an exemplary embodiment, a substrate having a first area and a second area is provided. The substrate includes a plurality of pads. Each of the pads has a pad size. The pad size in the first area is larger than the pad size in the second area.
Claims20
A device comprising:
- a substrate comprising:
- first pads in a core area of the substrate;
- second pads in a corner area of the substrate;
- and
- third pads in an edge area of the substrate, the edge area extending around each side of the core area in a top-down view, a widest portion of the third pads having a lesser width than a widest portion of the first pads and a widest portion of the second pads in a cross-sectional view;
- and
- a chip comprising bumps, each of the bumps having a substantially same width as the widest portion of the first pads and the widest portion of the second pads in the cross-sectional view, a first subset of the bumps connected to the first pads of the substrate, a second subset of the bumps connected to the second pads of the substrate, a third subset of the bumps connected to the third pads of the substrate.
4 more elements
A device comprising:
- a substrate comprising:
- first pads in a core area of the substrate;
- second pads in a corner area of the substrate;
- and
- third pads in other areas in the substrate except the core area and the corner area;
- and
- a chip comprising bumps, each of the bumps having a substantially same width as the first pads and the second pads, the bumps having a larger width than the third pads, a first subset of the bumps connected to the first pads of the substrate, a second subset of the bumps connected to the second pads of the substrate, a third subset of the bumps connected to the third pads of the substrate.
4 more elements
A device comprising:
- a substrate comprising:
- first traces in a core area of the substrate, a center of the core area aligned to a center of the substrate, the first traces each having a first width and having a first length along a surface of the substrate, the first length greater than the first width;
- and
- second traces in a non-core area of the substrate, the non-core area adjacent the core area, the second traces each having a second width and having a second length along the surface of the substrate, the second length greater than the second width, the second width less than the first width;
- and
- a chip comprising bumps, each of the bumps having a same width, a first subset of the bumps connected to the first traces of the substrate, a second subset of the bumps connected to the second traces of the substrate.
3 more elements
Dependencies are inferred from the claim text.