Chip package structure, chip structure and method for forming chip structure
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsChien-Cheng Chen, Pei-Haw Tsao
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Abstract
A chip structure is provided. The chip structure includes a substrate. The chip structure includes an interconnect layer over the substrate. The chip structure includes a conductive pad over the interconnect layer. The chip structure includes a conductive bump over the conductive pad. The conductive bump has a first portion, a second portion, and a neck portion between the first portion and the second portion. The first portion is between the neck portion and the conductive pad. The neck portion is narrower than the first portion and narrower than the second portion.
Claims20
A chip structure, comprising:
- a substrate;
- an interconnect layer over the substrate;
- a conductive pad over the interconnect layer;
- a conductive bump over the conductive pad, wherein the conductive bump has a first portion, a second portion, and a neck portion between the first portion and the second portion, the first portion is between the neck portion and the conductive pad, and the neck portion is narrower than the first portion and narrower than the second portion;
- and
- an alloy layer between the conductive bump and the conductive pad, wherein a first composition of the alloy layer is different from a second composition of the conductive bump, and the alloy layer has a first width decreasing toward the conductive bump.
A chip package structure, comprising:
- a wiring substrate;
- and
- a chip structure over the wiring substrate, wherein the chip structure comprises:
- a substrate;
- an interconnect layer under the substrate;
- a first conductive pad under the interconnect layer;
- and
- a conductive bump connected between the first conductive pad and the wiring substrate, and the conductive bump has a first portion, a second portion, and a neck portion between the first portion and the second portion, a first width of the first portion decreases toward the neck portion, a second width of the second portion decreases toward the neck portion,
- the wiring substrate comprises a second conductive pad, the conductive bump is connected between the first conductive pad and the second conductive pad, and a first center portion of the first conductive pad is misaligned with a second center portion of the second conductive pad relative to an axis perpendicular to a surface of the substrate, and the interconnect layer is under the surface.
A method for forming a chip structure, comprising:
- providing a substrate, an interconnect layer, and a conductive pad, wherein the interconnect layer is over the substrate, and the conductive pad is over the interconnect layer;
- forming a conductive structure over the conductive pad, wherein the conductive structure comprises a first conductive layer, a second conductive layer, and a third conductive layer, the first conductive layer is between the conductive pad and the second conductive layer, the second conductive layer is between the first conductive layer and the third conductive layer, a first composition of the second conductive layer is different from a second composition of the first conductive layer and a third composition of the third conductive layer, and the second conductive layer is thicker than the first conductive layer and the third conductive layer;
- and
- partially removing the second conductive layer, wherein the second conductive layer has a concave sidewall after partially removing the second conductive layer.
Dependencies are inferred from the claim text.