Semiconductor device and method of manufacture
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsJiun Yi Wu, Chen-Hua Yu
Life of this patent
Estimating the term…
Abstract
A device includes a redistribution structure, including conductive features; dielectric layers; and an internal support within a first dielectric layer of the dielectric layers, wherein the internal support is free of passive and active devices; a first interconnect structure attached to a first side of the redistribution structure; a second interconnect structure attached to the first side of the redistribution structure, wherein the second interconnect structure is laterally adjacent the first interconnect structure, wherein the internal support laterally overlaps both the first interconnect structure and the second interconnect structure.
Claims20
A device comprising:
- a redistribution structure, comprising:
- a plurality of conductive features;
- a plurality of dielectric layers;
- an internal support within a first dielectric layer of the plurality of dielectric layers, wherein the internal support is free of passive and active devices;
- and
- an adhesive layer on a bottom surface of the internal support;
- a first interconnect structure attached to a first side of the redistribution structure;
- a second interconnect structure attached to the first side of the redistribution structure, wherein the second interconnect structure is laterally adjacent the first interconnect structure, wherein the internal support laterally overlaps both the first interconnect structure and the second interconnect structure.
A structure comprising:
- a plurality of core substrates attached to a first side of a redistribution structure, wherein the redistribution structure comprises:
- a plurality of first redistribution layers;
- a plurality of internal supports attached to at least one of the plurality of first redistribution layers, wherein the plurality of internal supports are free of electrical connection to the plurality of first redistribution layers;
- and
- a plurality of second redistribution layers on the plurality of first redistribution layers and over the plurality of internal supports, wherein the plurality of internal supports are free of electrical connection to the plurality of second redistribution layers;
- and
- an integrated device package attached to a second side of the redistribution structure, wherein the integrated device package laterally overlaps at least one internal support of the plurality of internal supports.
A package, comprising:
- an internal support on a plurality of first redistribution layers, wherein the internal support is an electrically inert material;
- a plurality of second redistribution layers on the plurality of first redistribution layers and over the internal support;
- a first interconnect substrate and a second interconnect substrate connected to the plurality of second redistribution layers, wherein the first interconnect substrate is laterally separated from the second interconnect substrate by a gap, wherein the gap is laterally aligned with the internal support;
- and
- a plurality of integrated circuit dies connected to the plurality of first redistribution layers.
Dependencies are inferred from the claim text.