US 11,894,238 B2Granted

Method of fabricating semiconductor device with reduced trench distortions

AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.

InventorsYung-Sung Yen, Chung-Ju Lee, Chun-Kuang Chen, Chia-Tien Wu, Ta-Ching Yu, Kuei-Shun Chen, Ru-Gun Liu, Shau-Lin Shue, Tsai-Sheng Gau, Yung-Hsu Wu

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Abstract

A method includes forming a material layer over a substrate, forming a first hard mask (HM) layer over the material layer, forming a first trench, along a first direction, in the first HM layer. The method also includes forming first spacers along sidewalls of the first trench, forming a second trench in the first HM layer parallel to the first trench, by using the first spacers to guard the first trench. The method also includes etching the material layer through the first trench and the second trench, removing the first HM layer and the first spacers, forming a second HM layer over the material layer, forming a third trench in the second HM layer. The third trench extends along a second direction that is perpendicular to the first direction and overlaps with the first trench. The method also includes etching the material layer through the third trench.

Claims20

Dependent claims

A method comprising:

forming a first material layer over a substrate;
forming a second material layer over the first material layer;
forming a first trench in the second material layer, wherein the first trench extends along a first direction;
forming a first spacer layer in the first trench;
after forming the first spacer layer in the trench, forming a second trench in the second material layer;
removing a first portion of the first material layer to extend the first trench into the first material layer and removing a second portion of the first material layer to extend the second trench into the first material layer thereby forming a patterned first material layer;
forming a third material layer over the patterned first material layer;
forming a third trench extending through the third material layer to thereby form a patterned third material layer, wherein the third trench extends along a second direction that is different than the first direction, wherein the third trench overlaps the extended first trench;
and
removing a third portion of the patterned first material layer through the third trench.

7 more elements

A method comprising:

forming a first material layer over a substrate;
forming a second material layer directly on the first material layer, the second material layer being formed of a different material than the first material layer;
forming a patterned third material layer directly on the second material layer, the patterned third material layer defining a first trench exposing a first portion of the second material layer;
forming a first spacer layer directly on the second material layer within the first trench;
forming a second trench in the patterned third material layer to expose a second portion of the second material layer;
removing the first portion of the second material layer to extend the first trench into the second material layer and removing the second portion of the second material layer to extend the second trench into the first material layer thereby forming a patterned second material layer;
removing the patterned third material layer and the first spacer layer;
forming a fourth material layer over the patterned second material layer;
forming a third trench extending through the fourth material layer to thereby form a patterned fourth material layer, wherein the third trench at least partially overlaps the extended first trench;
removing a third portion of the patterned second material layer through the third trench;
and
after removing the third portion of the patterned second material layer through the third trench, patterning the first material layer by using the patterned second material layer as a first mask.

9 more elements

Dependencies are inferred from the claim text.

Facts

Application: 17/861,586Filed 11 Jul 2022 · continuation
Priority: 13 Mar 2015
Published: US 2022/0344170 A127 Oct 2022
Granted: 6 Feb 2024
Term ends: Not estimatedThe source records don’t support an estimate.

Classification12 codes

H10P 50/73
Etching of wafers, substrates or parts of devices: using masks for insulating materials
H10P 50/71
Etching of wafers, substrates or parts of devices: using masks for conductive or resistive materials
H10P 76/4085
Characterised by their sizes, orientations, dispositions, behaviours or shapes: characterised by the processes involved to create the masks
H10W 20/089
By forming openings in the dielectric parts: using processes for implementing desired shapes or dispositions of the openings, e.g. double patterning

Family

Application14/657,763Parent of this continuation · filed 13 Mar 2015
Application15/237,898Parent of this division · filed 16 Aug 2016
US 9,418,868 B1Parent of this continuation · filed 16 Aug 2016
Application16/229,339Parent of this continuation · filed 21 Dec 2018
US 10,163,654 B2Parent of this division · filed 25 Dec 2018
Application17/080,248Parent of this continuation · filed 26 Oct 2020
US 10,818,509 B2Parent of this continuation · filed 27 Oct 2020
US 2022/0344170 A1Pre-grant publication · published 27 Oct 2022
US 11,387,113 B2Parent of this continuation
Application16/229,339Parent of this division
Application15/237,898Parent of this continuation
US 2016/0358788 A1Published application
US 2019/0122895 A1Published application
US 2021/0057231 A1Published application
US 11,894,238 B2This patent

From the US filing history. Foreign family members aren’t listed.