Multilayer electronic component

A method of manufacturing a multilayer electronic component, the method comprising:

• preparing a plurality of first ceramic green sheets on which a plurality of internal electrode patterns are respectively formed;
• forming a dielectric material at least partially in a region other than the internal electrode patterns with respect to the plurality of first ceramic green sheets;
• forming a laminate body by laminating the plurality of first ceramic green sheets such that adjacent internal electrodes of the internal electrode patterns intersect each other in a lamination direction in which the plurality of first ceramic green sheets are laminated, and laminating a second ceramic green sheet in the lamination direction on the plurality of first ceramic green sheets;
• and
• preparing a body including an active portion including a first dielectric layer made of one of the plurality of first ceramic green sheets, an internal electrode made of one of the internal electrode patterns, and a dielectric pattern made of the dielectric material, and a cover portion including a second dielectric layer made of the second ceramic green sheet, by baking the laminate body,
• wherein the dielectric pattern has a porosity higher than that of the first dielectric layer.

A multilayer electronic component, comprising:

• a body including first dielectric layers and internal electrodes alternately disposed, and a cover portion disposed on the active portion in a first direction of the body, a direction in which the first dielectric layers and the internal electrodes are laminated, the cover portion including a second dielectric layer;
• and
• an external electrode disposed externally on the body and connected to one of the internal electrodes,
• wherein the body includes a margin portion covering all side surfaces of the one of the internal electrodes other than a side surface connected to the external electrode,
• the margin portion includes a dielectric pattern, and
• an average size of dielectric grains of one of the first dielectric layers disposed in a region overlapping the one of the internal electrodes in the active portion and an average size of dielectric grains disposed in the margin portion have a deviation of 50 nm or less therebetween.

A multilayer electronic component, comprising:

• a body including first dielectric layers and internal electrodes alternately disposed, and a cover portion disposed on the active portion in a first direction of the body, a direction in which the first dielectric layers and the internal electrodes are laminated, the cover portion including a second dielectric layer;
• and
• an external electrode disposed externally on the body and connected to one of the internal electrodes,
• wherein the body includes a margin portion covering all side surfaces of the one of the internal electrodes other than a side surface connected to the external electrode,
• the margin portion includes a dielectric pattern, and
• a difference between an average size of dielectric grains of one of the first dielectric layers disposed in a region overlapping the one of the internal electrodes in the active portion and an average size of dielectric grains disposed in the margin portion, with respect to the average size of dielectric grains disposed in the margin portion, is 15.6% or less.