Memory section selection for a memory built-in self-test

A memory device, comprising:

• one or more components configured to:
• read a first set of bits stored in a test control mode register of the memory device;
• identify a test mode, for performing a memory built-in self-test, based on the first set of bits;
• read a second set of bits stored in a section identifier mode register of the memory device;
• identify one or more memory sections of the memory device for which the memory built-in self-test is to be performed, based on the second set of bits,
• wherein the one or more memory sections are a subset of a plurality of memory sections into which the memory device is divided;
• perform the memory built-in self-test for the one or more memory sections of the memory device based on the test mode;
• and
• write a value to a third set of bits of a test status mode register to indicate a test status based on performing the memory built-in self-test, wherein:
• a first value of the third set of bits indicates that no failures were detected based on performing the memory built-in self-test for the one or more memory sections,
• a second value of the third set of bits indicates that a repairable failure exists in the one or more memory sections,
• a third value of the third set of bits indicates that an unrepairable failure remains in the one or more memory sections, and
• a fourth value of the third set of bits indicates that the memory built-in self-test is unreliable.

A system, comprising:

• a host device, wherein the host device is configured to:
• write to a test control mode register of a memory device to enable a memory built-in self-test to be performed by the memory device;
• and
• write to a section identifier mode register of the memory device to indicate one or more sections of the memory device, the one or more sections of the memory device corresponding to a subset of a plurality of sections of the memory device for which the memory built-in self-test is to be performed;
• and
• the memory device, wherein the memory device is configured to:
• perform, based on respective values stored in the test control mode register and the section identifier mode register.

A method, comprising:

• reading, by a memory device, a first set of bits stored in a first mode register of the memory device;
• identifying, by the memory device, a test mode, for performing a memory built-in self-test, based on the first set of bits;
• identifying, by the memory device and based at least in part on a second set of bits indicating one or more memory sections of a plurality of memory sections of the memory device, a subset of the plurality of memory sections that are testable using the memory built-in self-test, the subset comprising the one or more memory sections;
• performing, by the memory device and based on the test mode, the memory built-in self-test for the one or more memory sections indicated by the second set of bits;
• and
• writing, by the memory device, to a third set of bits stored in a third mode register of the memory device based on a result of performing the memory built-in self-test.