Selective margin testing to determine whether to signal train a memory system
AssigneeIntel Corporation
InventorsDujian Wu, Shijian Ge, Daocheng Bu
Life of this patent
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Abstract
Method, systems and apparatuses may provide for technology that executes a margin test of a first memory storage based on a subset of first signals associated with the first memory storage. The technology determines, based on the margin test, first margin data to indicate whether the first memory storage complies with one or more electrical constraints. The technology determines, based on the first margin data, whether to execute a signal training process.
Claims24
A computing device comprising:
- a host processor;
- and
- a plurality of memory storages coupled to the host processor and including a first memory storage, the plurality of memory storages including executable program instructions, which when executed by the host processor, cause the host processor to:
- execute a margin test of the first memory storage based on a subset of first signals associated with the first memory storage;
- determine, based on the margin test, first margin data to indicate whether the first memory storage complies with one or more electrical constraints;
- and
- determine, based on the first margin data, whether to execute a signal training process to retrain a plurality of signals associated with the plurality of memory storages.
A semiconductor apparatus comprising:
- one or more substrates;
- and
- logic coupled to the one or more substrates, wherein the logic is implemented in one or more of configurable logic or fixed-functionality logic hardware, the logic coupled to the one or more substrates to:
- execute a margin test of a first memory storage based on a subset of first signals associated with the first memory storage;
- determine, based on the margin test, first margin data to indicate whether the first memory storage complies with one or more electrical constraints;
- and
- determine, based on the first margin data, whether to execute a signal training process to retrain a plurality of signals associated with a plurality of memory storages, wherein the plurality of memory storages includes the first memory storage.
At least one non-transitory computer readable storage medium comprising a set of executable program instructions, which when executed by a computing system, cause the computing system to:
- execute a margin test of a first memory storage based on a subset of first signals associated with the first memory storage;
- determine, based on the margin test, first margin data to indicate whether the first memory storage complies with one or more electrical constraints;
- and
- determine, based on the first margin data, whether to execute a signal training process to retrain a plurality of signals associated with a plurality of memory storages, wherein the plurality of memory storages includes the first memory storage.
A method comprising:
- executing a margin test of a first memory storage based on a subset of first signals associated with the first memory storage;
- determining, based on the margin test, first margin data indicating whether the first memory storage complies with one or more electrical constraints;
- and
- determining whether to execute a signal training process based on the first margin data to retrain a plurality of signals associated with a plurality of memory storages, wherein the plurality of memory storages includes the first memory storage.
Dependencies are inferred from the claim text.