Proactive refresh of edge data word line for semi-circle drain side select gate

A controller in communication with a memory apparatus including memory cells connected to one of a plurality of word lines including at least one edge word line and a plurality of other data word lines and arranged in strings and configured to retain a threshold voltage corresponding to one of a plurality of data states, wherein the strings are arranged in rows including full circle rows and semi-circle rows, the controller configured to:

• identify the at least one edge word line;
• and
• instruct the memory apparatus to periodically apply a program voltage to the at least one edge word line to reprogram the memory cells associated with the at least one edge word line without erasing the memory cells associated with the at least one edge word line, wherein periodically applying the program voltage includes applying an inhibiting bit line voltage to ones of a plurality of bit lines coupled to the strings of the full circle rows while reprogramming the memory cells associated with the at least one edge word line to inhibit reprogramming of the memory cells in the strings associated with the full circle rows.

A method of operating a memory apparatus including memory cells connected to one of a plurality of word lines including at least one edge word line and a plurality of other data word lines and arranged in strings and configured to retain a threshold voltage corresponding to one of a plurality of data states, wherein the strings are arranged in rows including full circle rows and semi-circle rows, the method comprising the steps of:

• identifying the at least one edge word line;
• and
• periodically applying a program voltage to the at least one edge word line to reprogram the memory cells associated with the at least one edge word line without erasing the memory cells associated with the at least one edge word line, wherein periodically applying the program voltage includes applying an inhibiting bit line voltage to ones of a plurality of bit lines coupled to the strings of the full circle rows while reprogramming the memory cells associated with the at least one edge word line to inhibit reprogramming of the memory cells in the strings associated with the full circle rows.