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US 11,894,060 B2Granted
Dual performance trim for optimization of non-volatile memory performance, endurance, and reliability
AssigneeWestern Digital Technologies, Inc.
InventorAjay Shyam Manwani
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Abstract
A non-volatile memory operates in a high perform mode when writing host data by using a first programming algorithm. When performing background operations, the non-volatile memory writes data using a lower performance, but higher endurance programming algorithm. In both cases the data is written in the same multi-level format, but the higher endurance programming algorithm uses, for example, a staircase waveform with a smaller step size. A count is kept for the number of program/erase cycles for memory blocks for both types of programming trim, but where a high performance write is weighted more heavily than a high endurance write.
Claims20
A non-volatile memory device, comprising:
- a control circuit configured to connect to one or more arrays, each array comprising a plurality of blocks each of a plurality of non-volatile memory cells, the control circuit configured to:
- receive a write command to program a first set of data to a first of the one or more arrays in a first format;
- determine whether the write command is a host write command;
- in response to determining that the write command is a host write command, write the first set of data into the first array in the first format using a first programming algorithm;
- determine whether the write command is a background write command;
- in response to determining that the write command is a background write command, write the first set of data into the first array in the first format using a second programming algorithm, the second programming algorithm being of a slower write speed than the first programming algorithm;
- and
- maintain, for each of the blocks of the first array, a count of a number of program/erase cycles experienced by the block, where a write to the block using the first programming algorithm is weighted more in the count than a write to the block using the second programming algorithm.
5 more elements
A method, comprising:
- maintaining, by a non-volatile memory device comprising an array having a plurality of blocks each of a plurality of non-volatile memory cells, an experience count for a number of program/erase cycles experienced by each of the blocks;
- receiving at the non-volatile memory device one or more commands to write data to a first of the blocks;
- determining for each of the one or more commands to write data to the first block whether the data is to be written according to a first programming algorithm or a second programming algorithm, the second programming algorithm being of a slower write speed than the first programming algorithm;
- in response to determining that the data is to be written to the first block according to the first programming algorithm, writing the data to the first block using the first programming algorithm and incrementing the experience count maintained for the first block by a first amount;
- and
- in response to determining that the data is to be written to the first block according to the second programming algorithm, writing the data to the first block using the first programming algorithm and incrementing the experience count maintained for the first block by a second amount, the second amount being less that first amount.
3 more elements
A system, comprising:
- a memory controller configured to receive data write commands from a host and to internally generate background write commands;
- and
- a plurality of non-volatile memory devices configured to receive and execute commands from the memory controller, each of the non-volatile memory devices comprising:
- one or more arrays non-volatile of memory cells, each array comprising a plurality of blocks each of a plurality of the non-volatile memory cells;
- and
- one or more control circuits connected to the one or more arrays and configured to:
- receive a write command to program a first set of data to a first of the one or more arrays in a first format;
- determine whether the write command is a data write command from the host;
- in response to determining that the write command is a write command from the host, write the first set of data into the first array in the first format using a first programming algorithm;
- determine whether the write command is a background write command;
- and
- in response to determining that the write command is a background write command, write the first set of data into the first array in the first format using a second programming algorithm, the second programming algorithm being of a slower write speed than the first programming algorithm.
9 more elements
Dependencies are inferred from the claim text.